SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
This register enables or inhibits automatic clock gating to individual sub-blocks
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| Instance Name | Physical Address |
|---|---|
| DMASS0_BCDMA_0 | 485C 0164h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| NOGATE_EDC | NOGATE_STATS | NOGATE_PROXY | NOGATE_PSILIF | NOGATE_P2P | NOGATE_RSVD8 | NOGATE_EHANDLER | NOGATE_RINGOCC |
| R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
| 0h | 0h | 0h | 0h | 0h | 0h | 0h | 0h |
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| NOGATE_RPCF | NOGATE_TPCF | NOGATE_PCF | NOGATE_RSVD7 | NOGATE_CFG | NOGATE_RSVD6 | ||
| R/W | R/W | R/W | R/W | R/W | R/W | ||
| 0h | 0h | 0h | 0h | 0h | 0h | ||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| NOGATE_RSVD6 | NOGATE_TRCU | NOGATE_RSVD5 | NOGATE_EVTCU | ||||
| R/W | R/W | R/W | R/W | ||||
| 0h | 0h | 0h | 0h | ||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| NOGATE_RWU3 | NOGATE_RWU2 | NOGATE_RWU1 | NOGATE_RWU0 | NOGATE_TRU3 | NOGATE_TRU2 | NOGATE_TRU1 | NOGATE_TRU0 |
| R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
| 0h | 0h | 0h | 0h | 0h | 0h | 0h | 0h |
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31 | NOGATE_EDC | R/W | 0h | When set inhibits automatic gating of clock. Reset Source: rst_mod_g_rst_n |
| 30 | NOGATE_STATS | R/W | 0h | When set inhibits automatic gating of clock. Reset Source: rst_mod_g_rst_n |
| 29 | NOGATE_PROXY | R/W | 0h | When set inhibits automatic gating of clock. Reset Source: rst_mod_g_rst_n |
| 28 | NOGATE_PSILIF | R/W | 0h | When set inhibits automatic gating of clock. Reset Source: rst_mod_g_rst_n |
| 27 | NOGATE_P2P | R/W | 0h | When set inhibits automatic gating of clock. Reset Source: rst_mod_g_rst_n |
| 26 | NOGATE_RSVD8 | R/W | 0h | Reserved PM signals. Reset Source: rst_mod_g_rst_n |
| 25 | NOGATE_EHANDLER | R/W | 0h | When set inhibits automatic gating of clock. Reset Source: rst_mod_g_rst_n |
| 24 | NOGATE_RINGOCC | R/W | 0h | When set inhibits automatic gating of clock. Reset Source: rst_mod_g_rst_n |
| 23 | NOGATE_RPCF | R/W | 0h | When set inhibits automatic gating of clock. Reset Source: rst_mod_g_rst_n |
| 22 | NOGATE_TPCF | R/W | 0h | When set inhibits automatic gating of clock. Reset Source: rst_mod_g_rst_n |
| 21 | NOGATE_PCF | R/W | 0h | When set inhibits automatic gating of clock. Reset Source: rst_mod_g_rst_n |
| 20:19 | NOGATE_RSVD7 | R/W | 0h | Reserved PM signals. Reset Source: rst_mod_g_rst_n |
| 18 | NOGATE_CFG | R/W | 0h | When set inhibits automatic gating of clock. Reset Source: rst_mod_g_rst_n |
| 17:11 | NOGATE_RSVD6 | R/W | 0h | Reserved PM signals. Reset Source: rst_mod_g_rst_n |
| 10 | NOGATE_TRCU | R/W | 0h | When set inhibits automatic gating of clock. Reset Source: rst_mod_g_rst_n |
| 9 | NOGATE_RSVD5 | R/W | 0h | Reserved PM signals. Reset Source: rst_mod_g_rst_n |
| 8 | NOGATE_EVTCU | R/W | 0h | When set inhibits automatic gating of clock. Reset Source: rst_mod_g_rst_n |
| 7 | NOGATE_RWU3 | R/W | 0h | When set inhibits automatic gating of clock. Reset Source: rst_mod_g_rst_n |
| 6 | NOGATE_RWU2 | R/W | 0h | When set inhibits automatic gating of clock. Reset Source: rst_mod_g_rst_n |
| 5 | NOGATE_RWU1 | R/W | 0h | When set inhibits automatic gating of clock. Reset Source: rst_mod_g_rst_n |
| 4 | NOGATE_RWU0 | R/W | 0h | When set inhibits automatic gating of clock. Reset Source: rst_mod_g_rst_n |
| 3 | NOGATE_TRU3 | R/W | 0h | When set inhibits automatic gating of clock. Reset Source: rst_mod_g_rst_n |
| 2 | NOGATE_TRU2 | R/W | 0h | When set inhibits automatic gating of clock. Reset Source: rst_mod_g_rst_n |
| 1 | NOGATE_TRU1 | R/W | 0h | When set inhibits automatic gating of clock. Reset Source: rst_mod_g_rst_n |
| 0 | NOGATE_TRU0 | R/W | 0h | When set inhibits automatic gating of clock. Reset Source: rst_mod_g_rst_n |