SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
The Capabilities Register 0 specifies which standard features this BCDMA instance supports.
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| Instance Name | Physical Address |
|---|---|
| DMASS0_BCDMA_0 | 485C 0120h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | GLOBAL_TRIG | LOCAL_TRIG | EOL | STATIC | |||
| NONE | R | R | R | R | |||
| 0h | 1h | 0h | 1h | 0h | |||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| TYPE15 | TYPE14 | TYPE13 | TYPE12 | TYPE11 | TYPE10 | TYPE9 | TYPE8 |
| R | R | R | R | R | R | R | R |
| 1h | 0h | 0h | 0h | 0h | 0h | 0h | 0h |
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| TYPE7 | TYPE6 | TYPE5 | TYPE4 | TYPE3 | TYPE2 | TYPE1 | TYPE0 |
| R | R | R | R | R | R | R | R |
| 0h | 0h | 0h | 0h | 1h | 1h | 1h | 1h |
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:20 | RESERVED | NONE | 0h | Reserved |
| 19 | GLOBAL_TRIG | R | 1h | Global triggers 0 and 1 are supported Reset Source: rst_mod_g_rst_n |
| 18 | LOCAL_TRIG | R | 0h | Dedicated local trigger is supported Reset Source: rst_mod_g_rst_n |
| 17 | EOL | R | 1h | EOL field is supported Reset Source: rst_mod_g_rst_n |
| 16 | STATIC | R | 0h | STATIC field is supported Reset Source: rst_mod_g_rst_n |
| 15 | TYPE15 | R | 1h | Type 15 TR is supported Reset Source: rst_mod_g_rst_n |
| 14 | TYPE14 | R | 0h | Type 14 TR is supported Reset Source: rst_mod_g_rst_n |
| 13 | TYPE13 | R | 0h | Type 13 TR is supported Reset Source: rst_mod_g_rst_n |
| 12 | TYPE12 | R | 0h | Type 12 TR is supported Reset Source: rst_mod_g_rst_n |
| 11 | TYPE11 | R | 0h | Type 11 TR is supported Reset Source: rst_mod_g_rst_n |
| 10 | TYPE10 | R | 0h | Type 10 TR is supported Reset Source: rst_mod_g_rst_n |
| 9 | TYPE9 | R | 0h | Type 9 TR is supported Reset Source: rst_mod_g_rst_n |
| 8 | TYPE8 | R | 0h | Type 8 TR is supported Reset Source: rst_mod_g_rst_n |
| 7 | TYPE7 | R | 0h | Type 7 TR is supported Reset Source: rst_mod_g_rst_n |
| 6 | TYPE6 | R | 0h | Type 6 TR is supported Reset Source: rst_mod_g_rst_n |
| 5 | TYPE5 | R | 0h | Type 5 TR is supported Reset Source: rst_mod_g_rst_n |
| 4 | TYPE4 | R | 0h | Type 4 TR is supported Reset Source: rst_mod_g_rst_n |
| 3 | TYPE3 | R | 1h | Type 3 TR is supported Reset Source: rst_mod_g_rst_n |
| 2 | TYPE2 | R | 1h | Type 2 TR is supported Reset Source: rst_mod_g_rst_n |
| 1 | TYPE1 | R | 1h | Type 1 TR is supported Reset Source: rst_mod_g_rst_n |
| 0 | TYPE0 | R | 1h | Type 0 TR is supported Reset Source: rst_mod_g_rst_n |