SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
It enables the target ports and defines the hold time of the target ports.
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| Instance Name | Physical Address |
|---|---|
| DEBUGSS_WRAP0 | 0007 6000 5000h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED | |||||||
| R | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | |||||||
| R | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED | MINHOLDTIME | ||||||
| R | R/W | ||||||
| 0h | 0h | ||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| SLVPORTEN | |||||||
| R/W | |||||||
| 0h | |||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:12 | RESERVED | R | 0h | Reserved, returns 0 |
| 11:8 | MINHOLDTIME | R/W | 0h | Minimum Hold time Hold time refers to the number of transactions that are output on the funnel initiator port from the same target while that target port ATVALIDSx is HIGH The CSTF holds for the minimum hold time and one additional cycle The maximum value that can be entered is 0xE and this equates to 15 cycles 0xF is reserved |
| 7:0 | SLVPORTEN | R/W | 0h | Target Port Enables Setting these bits enables the corresponding input, or target port If a bit is not set then this has the effect of excluding that port from the priority selection scheme |