SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
The Capability Register provides information on the number of Power State registers implemented in the AP
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| Instance Name | Physical Address |
|---|---|
| DEBUGSS_WRAP0 | 0007 0000 24F0h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED | |||||||
| R | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | |||||||
| R | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED | |||||||
| R | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED | NUMSTATREG | ||||||
| R | R | ||||||
| 0h | 0h | ||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:6 | RESERVED | R | 0h | Reserved, returns 0 |
| 5:0 | NUMSTATREG | R | 0h | The value read indicates the number of valid Power State Registers that are implemented in the system The maximum number is 60 and the minimum number is 1 The registers are always implemented at contiguous addresses so a value of 7 means that registers 0-6 are valid |