SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
Enet Port N 802.3 Tx Pause Timer
Return to Summary Table
| Instance Name | Physical Address |
|---|---|
| CPSW0 | 0802 2370h + formula |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| TX_PAUSETIMER | |||||||
| R/W | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| TX_PAUSETIMER | |||||||
| R/W | |||||||
| 0h | |||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:16 | RESERVED | NONE | 0h | Reserved |
| 15:0 | TX_PAUSETIMER | R/W | 0h | 802.3 Tx Pause Timer Value. This field allows the contents of the transmit pause timer to be observed (and written in test mode). The transmit pause timer is loaded by a received (incoming) pause frame, and then decremented, at slottime intervals, down to zero at which time Ethernet Port transmit frames are again enabled. This register is for 802.3 Based flow control and is not used for 802.1qbb Priority Based Flow Control (PFC). |