SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
Configures IO debounce selections
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| Instance Name | Physical Address |
|---|---|
| MCU_CTRL_MMR0 | 0450 6090h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED | DBOUNCE_CFG4_DB_CFG_PROXY | ||||||
| NONE | R/W | ||||||
| 0h | 0h | ||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:6 | RESERVED | NONE | 0h | Reserved |
| 5:0 | DBOUNCE_CFG4_DB_CFG_PROXY | R/W | 0h | Configures the debounce period used for I/Os with PADCONFIGx_DEBOUNCE_SEL = 4. Debounce period is specified as a number of CLK0 or CLK1 clock cycles. For all inputs CLK0 is CLK_32K_RC and CLK1 is HFOSC0_CLKOUT. Field values (others are reserved): 6'b000000 - BYPASS 6'b000001 - DB_64_CLK0 6'b000010 - DB_96_CLK0 6'b000011 - DB_128_CLK0 6'b000100 - DB_160_CLK0 6'b000101 - DB_192_CLK0 6'b000110 - DB_224_CLK0 6'b000111 - DB_256_CLK0 6'b001000 - DB_288_CLK0 6'b001001 - DB_320_CLK0 6'b001010 - DB_352_CLK0 6'b001011 - DB_384_CLK0 6'b001100 - DB_416_CLK0 6'b001101 - DB_448_CLK0 6'b001110 - DB_480_CLK0 6'b001111 - DB_512_CLK0 6'b010000 - DB_544_CLK0 6'b010001 - DB_576_CLK0 6'b010010 - DB_608_CLK0 6'b010011 - DB_640_CLK0 6'b010100 - DB_672_CLK0 6'b010101 - DB_704_CLK0 6'b010110 - DB_512_CLK0 6'b010111 - DB_1024_CLK0 6'b011000 - DB_1536_CLK0 6'b011001 - DB_2048_CLK0 6'b011010 - DB_2560_CLK0 6'b011011 - DB_3072_CLK0 6'b011100 - DB_3584_CLK0 6'b011101 - DB_4096_CLK0 6'b011110 - DB_4608_CLK0 6'b011111 - DB_5120_CLK0 6'b100000 - DB_1_CLK1 6'b100001 - DB_2_CLK1 6'b100010 - DB_3_CLK1 6'b100011 - DB_4_CLK1 6'b100100 - DB_5_CLK1 6'b100101 - DB_6_CLK1 6'b100110 - DB_7_CLK1 6'b100111 - DB_8_CLK1 6'b101000 - DB_9_CLK1 6'b101001 - DB_10_CLK1 6'b101010 - DB_11_CLK1 6'b101011 - DB_12_CLK1 6'b101100 - DB_13_CLK1 6'b101101 - DB_14_CLK1 6'b101110 - DB_15_CLK1 6'b101111 - DB_16_CLK1 6'b110000 - DB_17_CLK1 6'b110001 - DB_18_CLK1 6'b110010 - DB_19_CLK1 6'b110011 - DB_20_CLK1 6'b110100 - DB_21_CLK1 6'b110101 - DB_22_CLK1 6'b110110 - DB_512_CLK1 6'b110111 - DB_1024_CLK1 6'b111000 - DB_1536_CLK1 6'b111001 - DB_2048_CLK1 6'b111010 - DB_2560_CLK1 6'b111011 - DB_3072_CLK1 6'b111100 - DB_3584_CLK1 6'b111101 - DB_4096_CLK1 6'b111110 - DB_4608_CLK1 6'b111111 - DB_5120_CLK1 Reset Source: mod_por_rst_n |