SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
Contains the status of each Timeout Gasket, to be read in ISR to determine which timeout gasket caused an interrupt.
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| Instance Name | Physical Address |
|---|---|
| MCU_CTRL_MMR0 | 0450 4610h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED | TOG_STAT_MST_TOG_STAT | ||||||
| NONE | R | ||||||
| 0h | 0h | ||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:2 | RESERVED | NONE | 0h | Reserved |
| 1:0 | TOG_STAT_MST_TOG_STAT | R | 0h | Error Status of Initiator Timeout Gaskets Field values (others are reserved): undefined - undefined undefined - undefined 2'b01 - RESERVED 2'b10 - WKUP_TIMEOUT0 undefined - undefined 2'b11 - RESERVED Reset Source: mod_g_rst_n |