SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
This is the standard TI peripheral ID register that exists at address 0 in the preipheral space
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| Instance Name | Physical Address |
|---|---|
| C7X256V0_DEBUG | 0007 3404 0000h |
| C7X256V1_DEBUG | 0007 3804 0000h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| SCHEME | BU | FUNCTION | |||||
| R | R | R | |||||
| 1h | 2h | 281h | |||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| FUNCTION | |||||||
| R | |||||||
| 281h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RTL_VER | MAJOR_REV | ||||||
| R | R | ||||||
| 0h | 1h | ||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| CUSTOM | MINOR_REV | ||||||
| R | R | ||||||
| 0h | 0h | ||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:30 | SCHEME | R | 1h | scheme Reset Source: cfg_rst_n |
| 29:28 | BU | R | 2h | Business Unit Reset Source: cfg_rst_n |
| 27:16 | FUNCTION | R | 281h | function Reset Source: cfg_rst_n |
| 15:11 | RTL_VER | R | 0h | rtl_ver Reset Source: cfg_rst_n |
| 10:8 | MAJOR_REV | R | 1h | major_rev Reset Source: cfg_rst_n |
| 7:6 | CUSTOM | R | 0h | custom Reset Source: cfg_rst_n |
| 5:0 | MINOR_REV | R | 0h | minor_rev Reset Source: cfg_rst_n |