SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
Trace Periodic Counter Register The periodic counter register specifies a count of the total number of bytes transmitted on the ATB interface after which a periodic sync point is generated in the streams that are active. This register is also used to periodically generate alignment synchronization sequences.
Return to Summary Table
| Instance Name | Physical Address |
|---|---|
| C7X256V0_DEBUG | 0007 3400 200Ch |
| C7X256V1_DEBUG | 0007 3800 200Ch |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED | |||||||
| R/W | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | |||||||
| R/W | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| COUNTER | |||||||
| R/W | |||||||
| 400h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| COUNTER | |||||||
| R/W | |||||||
| 400h | |||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:16 | RESERVED | R/W | 0h | reserved |
| 15:0 | COUNTER | R/W | 400h | Synchronization Frequency A value of 0 disables the counter A reset sets the frequence by default to '1024' |