SPRUJ52C june 2022 – july 2023 AM69 , AM69A , TDA4AH-Q1 , TDA4AP-Q1 , TDA4VH-Q1 , TDA4VP-Q1
Table 4-53 summarizes the ROM code settings used to configure MCU_PLL0, MCU_PLL2, Main PLL0, and Main PLL3 for the supported input clocks.
2000 MHz VCO frequency | |||||||
---|---|---|---|---|---|---|---|
Ref clk | Refdiv | Pfd freq | Fbdiv | Frac | Vco | Delta | Postdiv |
19.2 | 1 | 19.2 | 104 | 2000 | 3.97×10-8 | 0 or 1 | |
20 | 1 | 20 | 100 | 0 | 2000 | 0 | 0 or 1 |
24 | 1 | 24 | 83 | 5592405 | 2000 | 1.99×10-8 | 0 or 1 |
25 | 1 | 25 | 80 | 0 | 2000 | 0 | 0 or 1 |
26 | 1 | 26 | 76 | 15486661 | 2000 | 5.50×10-8 | 0 or 1 |
27 | 1 | 27 | 74 | 1242757 | 2000 | 4.42×10-8 | 0 or 1 |