SPRUJ52C june 2022 – july 2023 AM69 , AM69A , TDA4AH-Q1 , TDA4AP-Q1 , TDA4VH-Q1 , TDA4VP-Q1
RAM ID Name | RAM ID | ECC Type | Inject Type | Accessible Flag | Row Width | RAM Size |
---|---|---|---|---|---|---|
CPU1_ITAG_RAM0 | 0 | ECC Wrapper | Inject only | Yes | 28 | 896 B |
CPU1_ITAG_RAM1 | 1 | ECC Wrapper | Inject only | Yes | 28 | 896 B |
CPU1_ITAG_RAM2 | 2 | ECC Wrapper | Inject only | Yes | 28 | 896 B |
CPU1_ITAG_RAM3 | 3 | ECC Wrapper | Inject only | Yes | 28 | 896 B |
CPU1_IDATA_BANK0 | 4 | ECC Wrapper | Inject only | Yes | 72 | 9 KB |
CPU1_IDATA_BANK1 | 5 | ECC Wrapper | Inject only | Yes | 72 | 9 KB |
CPU1_IDATA_BANK2 | 6 | ECC Wrapper | Inject only | Yes | 72 | 9 KB |
CPU1_IDATA_BANK3 | 7 | ECC Wrapper | Inject only | Yes | 72 | 9 KB |
CPU1_DTAG_RAM0 | 8 | ECC Wrapper | Inject only | Yes | 28 | 896 B |
CPU1_DTAG_RAM1 | 9 | ECC Wrapper | Inject only | Yes | 28 | 896 B |
CPU1_DTAG_RAM2 | 10 | ECC Wrapper | Inject only | Yes | 28 | 896 B |
CPU1_DTAG_RAM3 | 11 | ECC Wrapper | Inject only | Yes | 28 | 896 B |
CPU1_DDIRTY_RAM | 12 | ECC Wrapper | Inject only | Yes | 28 | 896 B |
CPU1_DDATA_RAM0 | 13 | ECC Wrapper | Inject only | Yes | 39 | 5 KB |
CPU1_DDATA_RAM1 | 14 | ECC Wrapper | Inject only | Yes | 39 | 5 KB |
CPU1_DDATA_RAM2 | 15 | ECC Wrapper | Inject only | Yes | 39 | 5 KB |
CPU1_DDATA_RAM3 | 16 | ECC Wrapper | Inject only | Yes | 39 | 5 KB |
CPU1_DDATA_RAM4 | 17 | ECC Wrapper | Inject only | Yes | 39 | 5 KB |
CPU1_DDATA_RAM5 | 18 | ECC Wrapper | Inject only | Yes | 39 | 5 KB |
CPU1_DDATA_RAM6 | 19 | ECC Wrapper | Inject only | Yes | 39 | 5 KB |
CPU1_DDATA_RAM7 | 20 | ECC Wrapper | Inject only | Yes | 39 | 5 KB |
PULSAR_SL_ATCM1_BANK0 | 21 | ECC Wrapper | Inject only | No | 39 | 20 KB |
PULSAR_SL_ATCM1_BANK1 | 22 | ECC Wrapper | Inject only | No | 39 | 20 KB |
PULSAR_SL_B0TCM1_BANK0 | 23 | ECC Wrapper | Inject only | No | 39 | 10 KB |
PULSAR_SL_B0TCM1_BANK1 | 24 | ECC Wrapper | Inject only | No | 39 | 10 KB |
PULSAR_SL_B1TCM1_BANK0 | 25 | ECC Wrapper | Inject only | No | 39 | 10 KB |
PULSAR_SL_B1TCM1_BANK1 | 26 | ECC Wrapper | Inject only | No | 39 | 10 KB |
CPU1_KS_VIM_RAMECC | 27 | ECC Wrapper | Inject with error capture | No | 30 | 2 KB |
CPU1_AXI2VBUSM_MEM_MST_RAMECC | 29 | ECC Wrapper | Inject with error capture | Yes | 66 | 528 B |
PULSAR_SL_MEM_MST1_KSBUS_AXI2VBUSM_RDATA_BUFFER | 30 | ECC Wrapper | Inject with error capture | Yes | 66 | 528 B |
CPU1_AXI2VBUSM_PERIPH_MST_RAMECC | 31 | ECC Wrapper | Inject with error capture | Yes | 34 | 17 B |
PULSAR_SL_PERIPH_MST1_KSBUS_AXI2VBUSM_RDATA_BUFFER | 32 | ECC Wrapper | Inject with error capture | Yes | 34 | 17 B |
CPU1_AHB2VBUSP_EDC | 33 | ECC Wrapper | Inject with error capture | Yes | 30 | 2 KB |
RAM ID Name | RAM ID | ECC Type | Inject Type | Accessible Flag | Max Number of Checkers |
---|---|---|---|---|---|
PULSAR_SL_KSBUS_VBUSM2AXI1_EDC_CTRL_0 | 28 | EDC Interconnect | Inject with error capture | Yes | 36 |
PULSAR_SL_CPU1_ECC_AGGR_EDC_CTRL | 34 | EDC Interconnect | Inject with error capture | Yes | 6 |
Protected Interconnect | Group ID | Width | Checker Type |
---|---|---|---|
PULSAR_SL_KSBUS_VBUSM2AXI1_EDC_CTRL_0 | 0 | 1 | Redundant |
PULSAR_SL_KSBUS_VBUSM2AXI1_EDC_CTRL_0 | 1 | 12 | Parity |
PULSAR_SL_KSBUS_VBUSM2AXI1_EDC_CTRL_0 | 2 | 4 | Parity |
PULSAR_SL_KSBUS_VBUSM2AXI1_EDC_CTRL_0 | 3 | 12 | Parity |
PULSAR_SL_KSBUS_VBUSM2AXI1_EDC_CTRL_0 | 4 | 23 | Parity |
PULSAR_SL_KSBUS_VBUSM2AXI1_EDC_CTRL_0 | 5 | 1 | Parity |
PULSAR_SL_KSBUS_VBUSM2AXI1_EDC_CTRL_0 | 6 | 10 | Parity |
PULSAR_SL_KSBUS_VBUSM2AXI1_EDC_CTRL_0 | 7 | 2 | Parity |
PULSAR_SL_KSBUS_VBUSM2AXI1_EDC_CTRL_0 | 8 | 3 | Parity |
PULSAR_SL_KSBUS_VBUSM2AXI1_EDC_CTRL_0 | 9 | 1 | Parity |
PULSAR_SL_KSBUS_VBUSM2AXI1_EDC_CTRL_0 | 10 | 2 | Parity |
PULSAR_SL_KSBUS_VBUSM2AXI1_EDC_CTRL_0 | 11 | 2 | Parity |
PULSAR_SL_KSBUS_VBUSM2AXI1_EDC_CTRL_0 | 12 | 1 | Parity |
PULSAR_SL_KSBUS_VBUSM2AXI1_EDC_CTRL_0 | 13 | 1 | Parity |
PULSAR_SL_KSBUS_VBUSM2AXI1_EDC_CTRL_0 | 14 | 1 | Parity |
PULSAR_SL_KSBUS_VBUSM2AXI1_EDC_CTRL_0 | 15 | 3 | Parity |
PULSAR_SL_KSBUS_VBUSM2AXI1_EDC_CTRL_0 | 16 | 4 | Parity |
PULSAR_SL_KSBUS_VBUSM2AXI1_EDC_CTRL_0 | 17 | 2 | Parity |
PULSAR_SL_KSBUS_VBUSM2AXI1_EDC_CTRL_0 | 18 | 2 | Parity |
PULSAR_SL_KSBUS_VBUSM2AXI1_EDC_CTRL_0 | 19 | 2 | Parity |
PULSAR_SL_KSBUS_VBUSM2AXI1_EDC_CTRL_0 | 20 | 1 | Redundant |
PULSAR_SL_KSBUS_VBUSM2AXI1_EDC_CTRL_0 | 21 | 32 | EDC |
PULSAR_SL_KSBUS_VBUSM2AXI1_EDC_CTRL_0 | 22 | 32 | EDC |
PULSAR_SL_KSBUS_VBUSM2AXI1_EDC_CTRL_0 | 23 | 8 | Parity |
PULSAR_SL_KSBUS_VBUSM2AXI1_EDC_CTRL_0 | 24 | 1 | Redundant |
PULSAR_SL_KSBUS_VBUSM2AXI1_EDC_CTRL_0 | 25 | 1 | Redundant |
PULSAR_SL_KSBUS_VBUSM2AXI1_EDC_CTRL_0 | 26 | 10 | Parity |
PULSAR_SL_KSBUS_VBUSM2AXI1_EDC_CTRL_0 | 27 | 64 | Parity |
PULSAR_SL_KSBUS_VBUSM2AXI1_EDC_CTRL_0 | 28 | 63 | Parity |
PULSAR_SL_KSBUS_VBUSM2AXI1_EDC_CTRL_0 | 29 | 17 | Parity |
PULSAR_SL_KSBUS_VBUSM2AXI1_EDC_CTRL_0 | 30 | 10 | Parity |
PULSAR_SL_KSBUS_VBUSM2AXI1_EDC_CTRL_0 | 31 | 7 | Parity |
PULSAR_SL_KSBUS_VBUSM2AXI1_EDC_CTRL_0 | 32 | 8 | Parity |
PULSAR_SL_KSBUS_VBUSM2AXI1_EDC_CTRL_0 | 33 | 8 | Parity |
PULSAR_SL_KSBUS_VBUSM2AXI1_EDC_CTRL_0 | 34 | 64 | Parity |
PULSAR_SL_KSBUS_VBUSM2AXI1_EDC_CTRL_0 | 35 | 56 | Parity |
PULSAR_SL_CPU1_ECC_AGGR_EDC_CTRL | 0 | 1 | Redundant |
PULSAR_SL_CPU1_ECC_AGGR_EDC_CTRL | 1 | 32 | EDC |
PULSAR_SL_CPU1_ECC_AGGR_EDC_CTRL | 2 | 1 | Parity |
PULSAR_SL_CPU1_ECC_AGGR_EDC_CTRL | 3 | 10 | Parity |
PULSAR_SL_CPU1_ECC_AGGR_EDC_CTRL | 4 | 4 | Parity |
PULSAR_SL_CPU1_ECC_AGGR_EDC_CTRL | 5 | 3 | Parity |