SPRUJ52C june 2022 – july 2023 AM69 , AM69A , TDA4AH-Q1 , TDA4AP-Q1 , TDA4VH-Q1 , TDA4VP-Q1
The destination address location is the initial destination address that will be accessed at the start of the transfer. All of the dimensions will also be based off of this value. This address can either physical or virtual based upon settings in the DMA channel Configuration register
While the DADDR field is 64 bits wide, the usable extent of the address on a K3 system is 48 bits of absolute offset plus a 4 bit address space selector which indicates 1 of 16 different orthogonal address spaces that the pointer is referencing within. The format of the DADDR field is given as follows:
Bits | Subfield | Description |
---|---|---|
63:52 | Reserved | Reserved |
51:48 | Address Space Select | Effectively bits 51:48 of the address. The value given in this field will be output by the DMA masters on the casel pin which is used by the infrastructure as an identifier for which address space this particular memory region is located within. Address space 0 is the default unified address space for a given device. Address spaces 1-15 are used for alternate address maps which may be external to the device (PCIe/Hyperlink) or in other ‘tiles’ on large devices. |
47:0 | Address | The 48-bit starting destination address for the transfer. This address will be interpreted to be either physical, virtual, or intermediate physical based on the tx_atype field in the DMA Tx channel’s Configuration Register. |