SPRUJ52C june 2022 – july 2023 AM69 , AM69A , TDA4AH-Q1 , TDA4AP-Q1 , TDA4VH-Q1 , TDA4VP-Q1
MSMC sets the associated bit in the MSMC_SMIRSTAT register when a software or hardware event occurs. Software can trigger the event by setting the corresponding bit in the MSMC_SMIRWS register. MSMC keeps the MSMC_SMIRSTAT bit asserted until software clears it by setting the corresponding bit in MSMC_SMIRC. Both MSMC_SMIRWS and MSMC_SMIRC are write-only registers and do not implement any actual state.