SPRUJ52C june 2022 – july 2023 AM69 , AM69A , TDA4AH-Q1 , TDA4AP-Q1 , TDA4VH-Q1 , TDA4VP-Q1
Table 12-362 lists the registers with their memory locations, sizes, and reset values.
Offset | Acronym | Register Description | Size (×16)/ #shadow |
---|---|---|---|
0h | EQEP_QPOSCNT | EQEP Position Counter Register | 2/0 |
4h | EQEP_QPOSINIT | EQEP Position Counter Initialization Register | 2/0 |
8h | EQEP_QPOSMAX | EQEP Maximum Position Count Register | 2/0 |
Ch | EQEP_QPOSCMP | EQEP Position-Compare Register | 2/1 |
10h | EQEP_QPOSILAT | EQEP Index Position Latch Register | 2/0 |
14h | EQEP_QPOSSLAT | EQEP Strobe Position Latch Register | 2/0 |
18h | EQEP_QPOSLAT | EQEP Position Counter Latch Register | 2/0 |
1Ch | EQEP_QUTMR | EQEP Unit Timer Register | 2/0 |
20h | EQEP_QUPRD | EQEP Unit Period Register | 2/0 |
24h | EQEP_QWD_TMR_PRD | EQEP Watchdog Timer and Period Register | 2/0 |
28h | EQEP_QDEC_QEP_CTL | EQEP Decoder and EQEP Control Register | 2/0 |
2Ch | EQEP_QCAP_QPOS_CTL | EQEP Capture and Position Compare Control Register | 2/0 |
30h | EQEP_QINT_EN_FLG | EQEP Interrupt Enable and Flag Register | 2/0 |
34h | EQEP_QINT_CLR_FRC | EQEP Interrupt Clear and Forcing Register | 2/0 |
38h | EQEP_QEP_STS_CT | EQEP Status and Capture Timer Register | 2/0 |
3Ch | EQEP_QC_PRD_TLAT | EQEP Capture Period ant Timer Latch Register | 2/0 |
40h | EQEP_QCPRDLAT | EQEP Capture Period Latch Register | 1/0 |
5Ch | EQEP_PID | EQEP Revision ID Register | 2/0 |