SPRUJ52C june 2022 – july 2023 AM69 , AM69A , TDA4AH-Q1 , TDA4AP-Q1 , TDA4VH-Q1 , TDA4VP-Q1
Table 13-5 shows the mapping of MCU and SoC AC/HC level probes to the MCU_DEBUGCELL CTI ports.
Trigger | Source/Sink |
---|---|
Trigger inputs | |
IN0 | MCU_EXPORT_SLV_0 (probe) match |
IN1 | MCU_SRAM_SLV_1 (probe) match |
IN2 | MCU_FSS_S0_2 (probe) match |
IN3 | MCU_FSS_S1_3 (probe) match |
IN4-IN7 | Reserved |
IN8 | _Global_Halt_Out |
IN9-IN31 | Reserved |
IN32 | AC_CBASS_SLV_0 (probe) match |
IN33 | AC_CBASS_SLV_1 (probe) match |
IN34 | AC_CBASS_SLV_2 (probe) match |
IN35 | AC_CBASS_SLV_3 (probe) match |
IN36 | DMPAC_SRAM_SLV (probe) match |
IN37 | VPAC_SRAM_SLV (probe) match |
IN38 | PCIE_HSLV_0 (probe) match |
IN39 | PCIE_HSLV_1 (probe) match |
IN40 | PCIE_HSLV_2 (probe) match |
IN41 | PCIE_HSLV_3 (probe) match |
IN42 | PCIE_LSLV_0 (probe) match |
IN43 | PCIE_LSLV_1 (probe) match |
IN44 | PCIE_LSLV_2 (probe) match |
IN45 | PCIE_LSLV_3 (probe) match |
IN46-IN63 | Reserved |
Trigger outputs | |
OUT0 | MCU_EXPORT_SLV_0 (probe) start |
OUT1 | MCU_EXPORT_SLV_0 (probe) stop |
OUT2 | MCU_SRAM_SLV_1 (probe) start |
OUT3 | MCU_SRAM_SLV_1 (probe) stop |
OUT4 | MCU_FSS_S0_2 (probe) start |
OUT5 | MCU_FSS_S0_2 (probe) stop |
OUT6 | MCU_FSS_S1_3 (probe) start |
OUT7 | MCU_FSS_S1_3 (probe) stop |
OUT8-OUT15 | Reserved |
OUT16 | _Global_Debug_Req_In |
OUT17 | _Global_Restart_In |
OUT18-OUT31 | Reserved |
OUT32 | AC_CBASS_SLV_0 (probe) start |
OUT33 | AC_CBASS_SLV_0 (probe) stop |
OUT34 | AC_CBASS_SLV_1 (probe) start |
OUT35 | AC_CBASS_SLV_1 (probe) stop |
OUT36 | AC_CBASS_SLV_2 (probe) start |
OUT37 | AC_CBASS_SLV_2 (probe) stop |
OUT38 | AC_CBASS_SLV_3 (probe) start |
OUT39 | AC_CBASS_SLV_3 (probe) stop |
OUT40 | DMPAC_SRAM_SLV (probe) start |
OUT41 | DMPAC_SRAM_SLV (probe) stop |
OUT42 | VPAC_SRAM_SLV (probe) start |
OUT43 | VPAC_SRAM_SLV (probe) stop |
OUT44 | PCIE_HSLV_0 (probe) start |
OUT45 | PCIE_HSLV_0 (probe) stop |
OUT46 | PCIE_HSLV_1 (probe) start |
OUT47 | PCIE_HSLV_1 (probe) stop |
OUT48 | PCIE_HSLV_2 (probe) start |
OUT49 | PCIE_HSLV_2 (probe) stop |
OUT50 | PCIE_HSLV_3 (probe) start |
OUT51 | PCIE_HSLV_3 (probe) stop |
OUT52 | PCIE_LSLV_0 (probe) start |
OUT53 | PCIE_LSLV_0 (probe) stop |
OUT54 | PCIE_LSLV_1 (probe) start |
OUT55 | PCIE_LSLV_1 (probe) stop |
OUT56 | PCIE_LSLV_2 (probe) start |
OUT57 | PCIE_LSLV_2 (probe) stop |
OUT58 | PCIE_LSLV_3 (probe) start |
OUT59 | PCIE_LSLV_3 (probe) stop |
OUT60-OUT63 | Reserved |