SPRUJ52C june 2022 – july 2023 AM69 , AM69A , TDA4AH-Q1 , TDA4AP-Q1 , TDA4VH-Q1 , TDA4VP-Q1
RAM ID Name | RAM ID | ECC Type | Inject Type | Accessible Flag | Max Number of Checkers |
---|---|---|---|---|---|
IJ7VC_DOM0_ECC_AGGR_EDC_CTRL | 0 | EDC Interconnect | Inject with error capture | Yes | 6 |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 1 | EDC Interconnect | Inject with error capture | Yes | 65 |
IDOM0_P2P_CPU0_PMST_SRC_EDC_CTRL_BUSECC | 2 | EDC Interconnect | Inject with error capture | Yes | 14 |
IDOM0_P2P_CPU0_PMST_DST_EDC_CTRL_BUSECC | 3 | EDC Interconnect | Inject with error capture | Yes | 3 |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 4 | EDC Interconnect | Inject with error capture | Yes | 72 |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 5 | EDC Interconnect | Inject with error capture | Yes | 69 |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 6 | EDC Interconnect | Inject with error capture | Yes | 72 |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 7 | EDC Interconnect | Inject with error capture | Yes | 69 |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 8 | EDC Interconnect | Inject with error capture | Yes | 65 |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 9 | EDC Interconnect | Inject with error capture | Yes | 65 |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 10 | EDC Interconnect | Inject with error capture | Yes | 65 |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 11 | EDC Interconnect | Inject with error capture | Yes | 65 |
IDOM0_M2M_MEMBDG_RMST0_MTOG_DST_EDC_CTRL_BUSECC | 12 | EDC Interconnect | Inject with error capture | Yes | 1 |
IDOM0_M2M_MEMBDG_WMST0_MTOG_DST_EDC_CTRL_BUSECC | 13 | EDC Interconnect | Inject with error capture | Yes | 1 |
Protected Interconnect | Group ID | Width | Checker Type |
---|---|---|---|
IJ7VC_DOM0_ECC_AGGR_EDC_CTRL | 0 | 1 | Redundant |
IJ7VC_DOM0_ECC_AGGR_EDC_CTRL | 1 | 32 | EDC |
IJ7VC_DOM0_ECC_AGGR_EDC_CTRL | 2 | 1 | Parity |
IJ7VC_DOM0_ECC_AGGR_EDC_CTRL | 3 | 10 | Parity |
IJ7VC_DOM0_ECC_AGGR_EDC_CTRL | 4 | 4 | Parity |
IJ7VC_DOM0_ECC_AGGR_EDC_CTRL | 5 | 3 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 0 | 24 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 1 | 1 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 2 | 1 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 3 | 1 | Redundant |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 4 | 23 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 5 | 10 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 6 | 1 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 7 | 3 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 8 | 3 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 9 | 1 | Redundant |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 10 | 10 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 11 | 1 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 12 | 1 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 13 | 1 | Redundant |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 14 | 10 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 15 | 1 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 16 | 1 | Redundant |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 17 | 10 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 18 | 10 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 19 | 1 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 20 | 1 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 21 | 3 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 22 | 10 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 23 | 3 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 24 | 1 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 25 | 1 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 26 | 2 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 27 | 2 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 28 | 1 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 29 | 1 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 30 | 1 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 31 | 4 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 32 | 3 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 33 | 8 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 34 | 8 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 35 | 8 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 36 | 8 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 37 | 1 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 38 | 8 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 39 | 3 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 40 | 3 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 41 | 1 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 42 | 1 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 43 | 1 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 44 | 5 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 45 | 4 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 46 | 2 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 47 | 1 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 48 | 3 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 49 | 1 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 50 | 3 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 51 | 3 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 52 | 2 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 53 | 1 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 54 | 3 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 55 | 1 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 56 | 3 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 57 | 3 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 58 | 1 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 59 | 3 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 60 | 1 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 61 | 5 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 62 | 1 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 63 | 4 | Parity |
IDOM0_M2M_CPU0_SLV_DST_EDC_CTRL_BUSECC | 64 | 4 | Parity |
IDOM0_P2P_CPU0_PMST_SRC_EDC_CTRL_BUSECC | 0 | 1 | Redundant |
IDOM0_P2P_CPU0_PMST_SRC_EDC_CTRL_BUSECC | 1 | 48 | Parity |
IDOM0_P2P_CPU0_PMST_SRC_EDC_CTRL_BUSECC | 2 | 3 | Parity |
IDOM0_P2P_CPU0_PMST_SRC_EDC_CTRL_BUSECC | 3 | 3 | Parity |
IDOM0_P2P_CPU0_PMST_SRC_EDC_CTRL_BUSECC | 4 | 1 | Parity |
IDOM0_P2P_CPU0_PMST_SRC_EDC_CTRL_BUSECC | 5 | 1 | Parity |
IDOM0_P2P_CPU0_PMST_SRC_EDC_CTRL_BUSECC | 6 | 2 | Parity |
IDOM0_P2P_CPU0_PMST_SRC_EDC_CTRL_BUSECC | 7 | 3 | Parity |
IDOM0_P2P_CPU0_PMST_SRC_EDC_CTRL_BUSECC | 8 | 1 | Parity |
IDOM0_P2P_CPU0_PMST_SRC_EDC_CTRL_BUSECC | 9 | 10 | Parity |
IDOM0_P2P_CPU0_PMST_SRC_EDC_CTRL_BUSECC | 10 | 5 | Parity |
IDOM0_P2P_CPU0_PMST_SRC_EDC_CTRL_BUSECC | 11 | 3 | Parity |
IDOM0_P2P_CPU0_PMST_SRC_EDC_CTRL_BUSECC | 12 | 4 | Parity |
IDOM0_P2P_CPU0_PMST_SRC_EDC_CTRL_BUSECC | 13 | 2 | Parity |
IDOM0_P2P_CPU0_PMST_DST_EDC_CTRL_BUSECC | 0 | 1 | Redundant |
IDOM0_P2P_CPU0_PMST_DST_EDC_CTRL_BUSECC | 1 | 1 | Redundant |
IDOM0_P2P_CPU0_PMST_DST_EDC_CTRL_BUSECC | 2 | 3 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 0 | 24 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 1 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 2 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 3 | 1 | Redundant |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 4 | 48 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 5 | 10 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 6 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 7 | 3 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 8 | 3 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 9 | 1 | Redundant |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 10 | 10 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 11 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 12 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 13 | 1 | Redundant |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 14 | 10 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 15 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 16 | 1 | Redundant |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 17 | 10 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 18 | 10 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 19 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 20 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 21 | 3 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 22 | 10 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 23 | 3 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 24 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 25 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 26 | 3 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 27 | 3 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 28 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 29 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 30 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 31 | 8 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 32 | 4 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 33 | 8 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 34 | 8 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 35 | 8 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 36 | 8 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 37 | 8 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 38 | 8 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 39 | 8 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 40 | 8 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 41 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 42 | 8 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 43 | 3 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 44 | 3 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 45 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 46 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 47 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 48 | 5 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 49 | 4 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 50 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 51 | 2 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 52 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 53 | 4 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 54 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 55 | 3 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 56 | 3 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 57 | 3 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 58 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 59 | 7 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 60 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 61 | 4 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 62 | 4 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 63 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 64 | 6 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 65 | 6 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 66 | 3 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 67 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 68 | 5 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 69 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 70 | 4 | Parity |
IDOM0_M2M_MEMBDG_RMST0_SRC_EDC_CTRL_BUSECC | 71 | 4 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 0 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 1 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 2 | 9 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 3 | 10 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 4 | 10 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 5 | 1 | Redundant |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 6 | 1 | Redundant |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 7 | 48 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 8 | 1 | Redundant |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 9 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 10 | 10 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 11 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 12 | 1 | Redundant |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 13 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 14 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 15 | 10 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 16 | 9 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 17 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 18 | 10 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 19 | 10 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 20 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 21 | 5 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 22 | 9 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 23 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 24 | 3 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 25 | 3 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 26 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 27 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 28 | 3 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 29 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 30 | 8 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 31 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 32 | 4 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 33 | 4 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 34 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 35 | 3 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 36 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 37 | 5 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 38 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 39 | 4 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 40 | 4 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 41 | 8 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 42 | 2 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 43 | 2 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 44 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 45 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 46 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 47 | 4 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 48 | 3 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 49 | 3 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 50 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 51 | 7 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 52 | 4 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 53 | 8 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 54 | 8 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 55 | 8 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 56 | 8 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 57 | 8 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 58 | 8 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 59 | 8 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 60 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 61 | 8 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 62 | 3 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 63 | 3 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 64 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 65 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 66 | 1 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 67 | 5 | Parity |
IDOM0_M2M_MEMBDG_RMST0_DST_EDC_CTRL_BUSECC | 68 | 4 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 0 | 24 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 1 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 2 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 3 | 1 | Redundant |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 4 | 48 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 5 | 10 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 6 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 7 | 3 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 8 | 3 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 9 | 1 | Redundant |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 10 | 10 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 11 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 12 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 13 | 1 | Redundant |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 14 | 10 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 15 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 16 | 1 | Redundant |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 17 | 10 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 18 | 10 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 19 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 20 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 21 | 3 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 22 | 10 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 23 | 3 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 24 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 25 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 26 | 3 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 27 | 3 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 28 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 29 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 30 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 31 | 8 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 32 | 4 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 33 | 8 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 34 | 8 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 35 | 8 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 36 | 8 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 37 | 8 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 38 | 8 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 39 | 8 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 40 | 8 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 41 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 42 | 8 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 43 | 3 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 44 | 3 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 45 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 46 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 47 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 48 | 5 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 49 | 4 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 50 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 51 | 2 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 52 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 53 | 4 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 54 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 55 | 3 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 56 | 3 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 57 | 3 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 58 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 59 | 7 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 60 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 61 | 4 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 62 | 4 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 63 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 64 | 6 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 65 | 6 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 66 | 3 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 67 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 68 | 5 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 69 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 70 | 4 | Parity |
IDOM0_M2M_MEMBDG_WMST0_SRC_EDC_CTRL_BUSECC | 71 | 4 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 0 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 1 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 2 | 9 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 3 | 10 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 4 | 10 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 5 | 1 | Redundant |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 6 | 1 | Redundant |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 7 | 48 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 8 | 1 | Redundant |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 9 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 10 | 10 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 11 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 12 | 1 | Redundant |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 13 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 14 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 15 | 10 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 16 | 9 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 17 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 18 | 10 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 19 | 10 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 20 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 21 | 5 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 22 | 9 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 23 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 24 | 3 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 25 | 3 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 26 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 27 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 28 | 3 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 29 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 30 | 8 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 31 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 32 | 4 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 33 | 4 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 34 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 35 | 3 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 36 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 37 | 5 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 38 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 39 | 4 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 40 | 4 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 41 | 8 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 42 | 2 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 43 | 2 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 44 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 45 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 46 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 47 | 4 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 48 | 3 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 49 | 3 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 50 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 51 | 7 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 52 | 4 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 53 | 8 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 54 | 8 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 55 | 8 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 56 | 8 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 57 | 8 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 58 | 8 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 59 | 8 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 60 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 61 | 8 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 62 | 3 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 63 | 3 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 64 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 65 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 66 | 1 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 67 | 5 | Parity |
IDOM0_M2M_MEMBDG_WMST0_DST_EDC_CTRL_BUSECC | 68 | 4 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 0 | 24 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 1 | 1 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 2 | 1 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 3 | 1 | Redundant |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 4 | 48 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 5 | 10 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 6 | 1 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 7 | 3 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 8 | 3 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 9 | 1 | Redundant |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 10 | 10 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 11 | 1 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 12 | 1 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 13 | 1 | Redundant |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 14 | 10 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 15 | 1 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 16 | 1 | Redundant |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 17 | 10 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 18 | 10 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 19 | 1 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 20 | 1 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 21 | 3 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 22 | 10 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 23 | 3 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 24 | 1 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 25 | 1 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 26 | 2 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 27 | 2 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 28 | 1 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 29 | 1 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 30 | 1 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 31 | 4 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 32 | 3 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 33 | 8 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 34 | 8 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 35 | 8 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 36 | 8 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 37 | 1 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 38 | 8 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 39 | 4 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 40 | 4 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 41 | 1 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 42 | 1 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 43 | 1 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 44 | 9 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 45 | 5 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 46 | 2 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 47 | 1 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 48 | 4 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 49 | 1 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 50 | 3 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 51 | 3 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 52 | 2 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 53 | 1 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 54 | 3 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 55 | 1 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 56 | 3 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 57 | 3 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 58 | 1 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 59 | 4 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 60 | 1 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 61 | 9 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 62 | 1 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 63 | 5 | Parity |
IDOM0_M2M_PBDG_RMST0_SRC_EDC_CTRL_BUSECC | 64 | 5 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 0 | 1 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 1 | 1 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 2 | 9 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 3 | 10 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 4 | 10 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 5 | 1 | Redundant |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 6 | 1 | Redundant |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 7 | 48 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 8 | 1 | Redundant |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 9 | 1 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 10 | 10 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 11 | 1 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 12 | 1 | Redundant |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 13 | 1 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 14 | 1 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 15 | 10 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 16 | 9 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 17 | 1 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 18 | 10 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 19 | 10 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 20 | 1 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 21 | 3 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 22 | 9 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 23 | 1 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 24 | 3 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 25 | 3 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 26 | 1 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 27 | 1 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 28 | 2 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 29 | 1 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 30 | 4 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 31 | 1 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 32 | 3 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 33 | 3 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 34 | 1 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 35 | 4 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 36 | 1 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 37 | 9 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 38 | 1 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 39 | 5 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 40 | 5 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 41 | 8 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 42 | 2 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 43 | 2 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 44 | 1 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 45 | 1 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 46 | 1 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 47 | 4 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 48 | 3 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 49 | 2 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 50 | 1 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 51 | 3 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 52 | 3 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 53 | 8 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 54 | 8 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 55 | 8 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 56 | 1 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 57 | 8 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 58 | 4 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 59 | 4 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 60 | 1 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 61 | 1 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 62 | 1 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 63 | 9 | Parity |
IDOM0_M2M_PBDG_RMST0_DST_EDC_CTRL_BUSECC | 64 | 5 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 0 | 24 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 1 | 1 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 2 | 1 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 3 | 1 | Redundant |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 4 | 48 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 5 | 10 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 6 | 1 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 7 | 3 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 8 | 3 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 9 | 1 | Redundant |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 10 | 10 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 11 | 1 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 12 | 1 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 13 | 1 | Redundant |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 14 | 10 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 15 | 1 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 16 | 1 | Redundant |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 17 | 10 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 18 | 10 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 19 | 1 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 20 | 1 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 21 | 3 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 22 | 10 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 23 | 3 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 24 | 1 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 25 | 1 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 26 | 2 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 27 | 2 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 28 | 1 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 29 | 1 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 30 | 1 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 31 | 4 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 32 | 3 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 33 | 8 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 34 | 8 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 35 | 8 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 36 | 8 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 37 | 1 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 38 | 8 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 39 | 4 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 40 | 4 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 41 | 1 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 42 | 1 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 43 | 1 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 44 | 9 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 45 | 5 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 46 | 2 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 47 | 1 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 48 | 4 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 49 | 1 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 50 | 3 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 51 | 3 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 52 | 2 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 53 | 1 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 54 | 3 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 55 | 1 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 56 | 3 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 57 | 3 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 58 | 1 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 59 | 4 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 60 | 1 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 61 | 9 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 62 | 1 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 63 | 5 | Parity |
IDOM0_M2M_PBDG_WMST0_SRC_EDC_CTRL_BUSECC | 64 | 5 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 0 | 1 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 1 | 1 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 2 | 9 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 3 | 10 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 4 | 10 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 5 | 1 | Redundant |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 6 | 1 | Redundant |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 7 | 48 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 8 | 1 | Redundant |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 9 | 1 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 10 | 10 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 11 | 1 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 12 | 1 | Redundant |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 13 | 1 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 14 | 1 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 15 | 10 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 16 | 9 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 17 | 1 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 18 | 10 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 19 | 10 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 20 | 1 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 21 | 3 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 22 | 9 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 23 | 1 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 24 | 3 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 25 | 3 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 26 | 1 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 27 | 1 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 28 | 2 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 29 | 1 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 30 | 4 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 31 | 1 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 32 | 3 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 33 | 3 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 34 | 1 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 35 | 4 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 36 | 1 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 37 | 9 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 38 | 1 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 39 | 5 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 40 | 5 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 41 | 8 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 42 | 2 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 43 | 2 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 44 | 1 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 45 | 1 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 46 | 1 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 47 | 4 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 48 | 3 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 49 | 2 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 50 | 1 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 51 | 3 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 52 | 3 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 53 | 8 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 54 | 8 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 55 | 8 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 56 | 1 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 57 | 8 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 58 | 4 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 59 | 4 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 60 | 1 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 61 | 1 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 62 | 1 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 63 | 9 | Parity |
IDOM0_M2M_PBDG_WMST0_DST_EDC_CTRL_BUSECC | 64 | 5 | Parity |
IDOM0_M2M_MEMBDG_RMST0_MTOG_DST_EDC_CTRL_BUSECC | 0 | 48 | Parity |
IDOM0_M2M_MEMBDG_WMST0_MTOG_DST_EDC_CTRL_BUSECC | 0 | 48 | Parity |