SPRUJ52C june 2022 – july 2023 AM69 , AM69A , TDA4AH-Q1 , TDA4AP-Q1 , TDA4VH-Q1 , TDA4VP-Q1
Interrupt Input Line | Interrupt ID | Source Interrupt |
---|---|---|
MCU_R5FSS0_CORE0_INTR_IN_0 | 0 | MCU_MCAN0_COMMON_0_MCANSS_MCAN_LVL_INT_0 |
MCU_R5FSS0_CORE0_INTR_IN_1 | 1 | MCU_MCAN0_COMMON_0_MCANSS_MCAN_LVL_INT_1 |
MCU_R5FSS0_CORE0_INTR_IN_2 | 2 | MCU_MCAN1_COMMON_0_MCANSS_MCAN_LVL_INT_0 |
MCU_R5FSS0_CORE0_INTR_IN_3 | 3 | MCU_MCAN1_COMMON_0_MCANSS_MCAN_LVL_INT_1 |
MCU_R5FSS0_CORE0_INTR_IN_4 | 4 | MCU_MCAN0_COMMON_0_MCANSS_EXT_TS_ROLLOVER_LVL_INT_0 |
MCU_R5FSS0_CORE0_INTR_IN_5 | 5 | MCU_MCAN1_COMMON_0_MCANSS_EXT_TS_ROLLOVER_LVL_INT_0 |
MCU_R5FSS0_CORE0_INTR_IN_6 | 6 | MCU_ADC12FCC0_COMMON_0_GEN_LEVEL_0 |
MCU_R5FSS0_CORE0_INTR_IN_7 | 7 | MCU_ADC12FCC1_COMMON_0_GEN_LEVEL_0 |
MCU_R5FSS0_CORE0_INTR_IN_14 | 14 | MCU_SA3_SS0_SA_UL_0_SA_UL_PKA_0 |
MCU_R5FSS0_CORE0_INTR_IN_15 | 15 | MCU_SA3_SS0_SA_UL_0_SA_UL_TRNG_0 |
MCU_R5FSS0_CORE0_INTR_IN_16 | 16 | MCU_I3C0_COMMON_0_I3C__INT_0 |
MCU_R5FSS0_CORE0_INTR_IN_17 | 17 | MCU_I3C1_COMMON_0_I3C__INT_0 |
MCU_R5FSS0_CORE0_INTR_IN_18 | 18 | MCU_I2C1_POINTRPEND_0 |
MCU_R5FSS0_CORE0_INTR_IN_20 | 20 | MCU_MCSPI0_INTR_SPI_0 |
MCU_R5FSS0_CORE0_INTR_IN_21 | 21 | MCU_MCSPI1_INTR_SPI_0 |
MCU_R5FSS0_CORE0_INTR_IN_22 | 22 | MCU_MCSPI2_INTR_SPI_0 |
MCU_R5FSS0_CORE0_INTR_IN_23 | 23 | MCU_I2C0_POINTRPEND_0 |
MCU_R5FSS0_CORE0_INTR_IN_24 | 24 | MCU_FSS0_OSPI_0_OSPI_LVL_INTR_0 |
MCU_R5FSS0_CORE0_INTR_IN_25 | 25 | MCU_FSS0_OSPI_1_OSPI_LVL_INTR_0 |
MCU_R5FSS0_CORE0_INTR_IN_26 | 26 | MCU_FSS0_HYPERBUS1P0_0_HPB_INTR_0 |
MCU_R5FSS0_CORE0_INTR_IN_27 | 27 | MCU_FSS0_FSAS_0_OTFA_INTR_ERR_PEND_0 |
MCU_R5FSS0_CORE0_INTR_IN_28 | 28 | MCU_FSS0_FSAS_0_ECC_INTR_ERR_PEND_0 |
MCU_R5FSS0_CORE0_INTR_IN_30 | 30 | MCU_UART0_USART_IRQ_0 |
MCU_R5FSS0_CORE0_INTR_IN_32 | 32 | MCU_CPSW0_COMMON_0_STAT_PEND_0 |
MCU_R5FSS0_CORE0_INTR_IN_34 | 34 | MCU_CPSW0_COMMON_0_EVNT_PEND_0 |
MCU_R5FSS0_CORE0_INTR_IN_35 | 35 | MCU_CPSW0_COMMON_0_MDIO_PEND_0 |
MCU_R5FSS0_CORE0_INTR_IN_36 | 36 | MCU_PBIST1_DFT_PBIST_CPU_0 |
MCU_R5FSS0_CORE0_INTR_IN_37 | 37 | MCU_PBIST2_DFT_PBIST_CPU_0 |
MCU_R5FSS0_CORE0_INTR_IN_38 | 38 | MCU_TIMER0_INTR_PEND_0 |
MCU_R5FSS0_CORE0_INTR_IN_39 | 39 | MCU_TIMER1_INTR_PEND_0 |
MCU_R5FSS0_CORE0_INTR_IN_40 | 40 | MCU_TIMER2_INTR_PEND_0 |
MCU_R5FSS0_CORE0_INTR_IN_41 | 41 | MCU_TIMER3_INTR_PEND_0 |
MCU_R5FSS0_CORE0_INTR_IN_42 | 42 | MCU_RTI0_INTR_WWD_0 |
MCU_R5FSS0_CORE0_INTR_IN_43 | 43 | MCU_RTI1_INTR_WWD_0 |
MCU_R5FSS0_CORE0_INTR_IN_44 | 44 | MCU_CTRL_MMR0_IPC_SET0_IPC_SET_IPCFG_0 |
MCU_R5FSS0_CORE0_INTR_IN_45 | 45 | MCU_CTRL_MMR0_IPC_SET1_IPC_SET_IPCFG_0 |
MCU_R5FSS0_CORE0_INTR_IN_46 | 46 | MCU_CTRL_MMR0_ACCESS_ERR_0 |
MCU_R5FSS0_CORE0_INTR_IN_47 | 47 | MCU_PBIST0_DFT_PBIST_CPU_0 |
MCU_R5FSS0_CORE0_INTR_IN_48 | 48 | MCU_ESM0_ESM_INT_LOW_LVL_0 |
MCU_R5FSS0_CORE0_INTR_IN_49 | 49 | MCU_ESM0_ESM_INT_HI_LVL_0 |
MCU_R5FSS0_CORE0_INTR_IN_50 | 50 | MCU_DCC0_INTR_DONE_LEVEL_0 |
MCU_R5FSS0_CORE0_INTR_IN_51 | 51 | MCU_DCC1_INTR_DONE_LEVEL_0 |
MCU_R5FSS0_CORE0_INTR_IN_52 | 52 | MCU_DCC2_INTR_DONE_LEVEL_0 |
MCU_R5FSS0_CORE0_INTR_IN_53 | 53 | MCU_ESM0_ESM_INT_CFG_LVL_0 |
MCU_R5FSS0_CORE0_INTR_IN_56 | 56 | MCU_R5FSS0_CORE0_VALIRQ_0 |
MCU_R5FSS0_CORE0_INTR_IN_57 | 57 | MCU_R5FSS0_CORE0_VALFIQ_0 |
MCU_R5FSS0_CORE0_INTR_IN_58 | 58 | MCU_R5FSS0_CORE0_CTI_0 |
MCU_R5FSS0_CORE0_INTR_IN_59 | 59 | MCU_R5FSS0_CORE1_CTI_0 |
MCU_R5FSS0_CORE0_INTR_IN_60 | 60 | MCU_R5FSS0_COMMON0_COMMRX_LEVEL_0_0 |
MCU_R5FSS0_CORE0_INTR_IN_61 | 61 | MCU_R5FSS0_COMMON0_COMMTX_LEVEL_0_0 |
MCU_R5FSS0_CORE0_INTR_IN_64 | 64 | MCU_NAVSS0_INTR_ROUTER_0_OUTL_INTR_0 |
MCU_R5FSS0_CORE0_INTR_IN_65 | 65 | MCU_NAVSS0_INTR_ROUTER_0_OUTL_INTR_1 |
MCU_R5FSS0_CORE0_INTR_IN_66 | 66 | MCU_NAVSS0_INTR_ROUTER_0_OUTL_INTR_2 |
MCU_R5FSS0_CORE0_INTR_IN_67 | 67 | MCU_NAVSS0_INTR_ROUTER_0_OUTL_INTR_3 |
MCU_R5FSS0_CORE0_INTR_IN_68 | 68 | MCU_NAVSS0_INTR_ROUTER_0_OUTL_INTR_4 |
MCU_R5FSS0_CORE0_INTR_IN_69 | 69 | MCU_NAVSS0_INTR_ROUTER_0_OUTL_INTR_5 |
MCU_R5FSS0_CORE0_INTR_IN_70 | 70 | MCU_NAVSS0_INTR_ROUTER_0_OUTL_INTR_6 |
MCU_R5FSS0_CORE0_INTR_IN_71 | 71 | MCU_NAVSS0_INTR_ROUTER_0_OUTL_INTR_7 |
MCU_R5FSS0_CORE0_INTR_IN_72 | 72 | MCU_NAVSS0_INTR_ROUTER_0_OUTL_INTR_8 |
MCU_R5FSS0_CORE0_INTR_IN_73 | 73 | MCU_NAVSS0_INTR_ROUTER_0_OUTL_INTR_9 |
MCU_R5FSS0_CORE0_INTR_IN_74 | 74 | MCU_NAVSS0_INTR_ROUTER_0_OUTL_INTR_10 |
MCU_R5FSS0_CORE0_INTR_IN_75 | 75 | MCU_NAVSS0_INTR_ROUTER_0_OUTL_INTR_11 |
MCU_R5FSS0_CORE0_INTR_IN_76 | 76 | MCU_NAVSS0_INTR_ROUTER_0_OUTL_INTR_12 |
MCU_R5FSS0_CORE0_INTR_IN_77 | 77 | MCU_NAVSS0_INTR_ROUTER_0_OUTL_INTR_13 |
MCU_R5FSS0_CORE0_INTR_IN_78 | 78 | MCU_NAVSS0_INTR_ROUTER_0_OUTL_INTR_14 |
MCU_R5FSS0_CORE0_INTR_IN_79 | 79 | MCU_NAVSS0_INTR_ROUTER_0_OUTL_INTR_15 |
MCU_R5FSS0_CORE0_INTR_IN_80 | 80 | MCU_NAVSS0_INTR_ROUTER_0_OUTL_INTR_16 |
MCU_R5FSS0_CORE0_INTR_IN_81 | 81 | MCU_NAVSS0_INTR_ROUTER_0_OUTL_INTR_17 |
MCU_R5FSS0_CORE0_INTR_IN_82 | 82 | MCU_NAVSS0_INTR_ROUTER_0_OUTL_INTR_18 |
MCU_R5FSS0_CORE0_INTR_IN_83 | 83 | MCU_NAVSS0_INTR_ROUTER_0_OUTL_INTR_19 |
MCU_R5FSS0_CORE0_INTR_IN_84 | 84 | MCU_NAVSS0_INTR_ROUTER_0_OUTL_INTR_20 |
MCU_R5FSS0_CORE0_INTR_IN_85 | 85 | MCU_NAVSS0_INTR_ROUTER_0_OUTL_INTR_21 |
MCU_R5FSS0_CORE0_INTR_IN_86 | 86 | MCU_NAVSS0_INTR_ROUTER_0_OUTL_INTR_22 |
MCU_R5FSS0_CORE0_INTR_IN_87 | 87 | MCU_NAVSS0_INTR_ROUTER_0_OUTL_INTR_23 |
MCU_R5FSS0_CORE0_INTR_IN_88 | 88 | MCU_SA3_SS0_INTAGGR_0_INTAGGR_VINTR_0 |
MCU_R5FSS0_CORE0_INTR_IN_89 | 89 | MCU_SA3_SS0_INTAGGR_0_INTAGGR_VINTR_1 |
MCU_R5FSS0_CORE0_INTR_IN_90 | 90 | MCU_SA3_SS0_INTAGGR_0_INTAGGR_VINTR_2 |
MCU_R5FSS0_CORE0_INTR_IN_91 | 91 | MCU_SA3_SS0_INTAGGR_0_INTAGGR_VINTR_3 |
MCU_R5FSS0_CORE0_INTR_IN_92 | 92 | MCU_SA3_SS0_INTAGGR_0_INTAGGR_VINTR_4 |
MCU_R5FSS0_CORE0_INTR_IN_93 | 93 | MCU_SA3_SS0_INTAGGR_0_INTAGGR_VINTR_5 |
MCU_R5FSS0_CORE0_INTR_IN_94 | 94 | MCU_SA3_SS0_INTAGGR_0_INTAGGR_VINTR_6 |
MCU_R5FSS0_CORE0_INTR_IN_95 | 95 | MCU_SA3_SS0_INTAGGR_0_INTAGGR_VINTR_7 |
MCU_R5FSS0_CORE0_INTR_IN_96 | 96 | WKUP_I2C0_POINTRPEND_0 |
MCU_R5FSS0_CORE0_INTR_IN_97 | 97 | WKUP_UART0_USART_IRQ_0 |
MCU_R5FSS0_CORE0_INTR_IN_98 | 98 | WKUP_ESM0_ESM_INT_LOW_LVL_0 |
MCU_R5FSS0_CORE0_INTR_IN_99 | 99 | WKUP_ESM0_ESM_INT_HI_LVL_0 |
MCU_R5FSS0_CORE0_INTR_IN_100 | 100 | WKUP_ESM0_ESM_INT_CFG_LVL_0 |
MCU_R5FSS0_CORE0_INTR_IN_102 | 102 | WKUP_SMS0_RAT_0_EXP_INTR_0 |
MCU_R5FSS0_CORE0_INTR_IN_103 | 103 | WKUP_SMS0_DBG_AUTH_0_DBG_AUTH_0 |
MCU_R5FSS0_CORE0_INTR_IN_104 | 104 | WKUP_SMS0_AESEIP38T_0_AES_SINTREQUEST_P_0 |
MCU_R5FSS0_CORE0_INTR_IN_105 | 105 | WKUP_SMS0_AESEIP38T_0_AES_SINTREQUEST_S_0 |
MCU_R5FSS0_CORE0_INTR_IN_106 | 106 | WKUP_SMS0_TIFS_CBASS_0_FW_EXCEPTION_INTR_0 |
MCU_R5FSS0_CORE0_INTR_IN_107 | 107 | WKUP_SMS0_COMMON_0_COMBINED_SEC_IN_0 |
MCU_R5FSS0_CORE0_INTR_IN_108 | 108 | MCU_TIMER4_INTR_PEND_0 |
MCU_R5FSS0_CORE0_INTR_IN_109 | 109 | MCU_TIMER5_INTR_PEND_0 |
MCU_R5FSS0_CORE0_INTR_IN_110 | 110 | MCU_TIMER6_INTR_PEND_0 |
MCU_R5FSS0_CORE0_INTR_IN_111 | 111 | MCU_TIMER7_INTR_PEND_0 |
MCU_R5FSS0_CORE0_INTR_IN_112 | 112 | MCU_TIMER8_INTR_PEND_0 |
MCU_R5FSS0_CORE0_INTR_IN_113 | 113 | MCU_TIMER9_INTR_PEND_0 |
MCU_R5FSS0_CORE0_INTR_IN_114 | 114 | WKUP_SMS0_HSM_CBASS_0_FW_EXCEPTION_INTR_0 |
MCU_R5FSS0_CORE0_INTR_IN_119 | 119 | WKUP_CTRL_MMR0_ACCESS_ERR_0 |
MCU_R5FSS0_CORE0_INTR_IN_120 | 120 | WKUP_PORZ_SYNC0_MAIN_PORZ_LATCHED_0 |
MCU_R5FSS0_CORE0_INTR_IN_122 | 122 | WKUP_RESETZ_SYNC0_MAIN_RESETZ_LATCHED_0 |
MCU_R5FSS0_CORE0_INTR_IN_124 | 124 | WKUP_GPIOMUX_INTRTR0_OUTP_0 |
MCU_R5FSS0_CORE0_INTR_IN_125 | 125 | WKUP_GPIOMUX_INTRTR0_OUTP_1 |
MCU_R5FSS0_CORE0_INTR_IN_126 | 126 | WKUP_GPIOMUX_INTRTR0_OUTP_2 |
MCU_R5FSS0_CORE0_INTR_IN_127 | 127 | WKUP_GPIOMUX_INTRTR0_OUTP_3 |
MCU_R5FSS0_CORE0_INTR_IN_128 | 128 | WKUP_GPIOMUX_INTRTR0_OUTP_4 |
MCU_R5FSS0_CORE0_INTR_IN_129 | 129 | WKUP_GPIOMUX_INTRTR0_OUTP_5 |
MCU_R5FSS0_CORE0_INTR_IN_130 | 130 | WKUP_GPIOMUX_INTRTR0_OUTP_6 |
MCU_R5FSS0_CORE0_INTR_IN_131 | 131 | WKUP_GPIOMUX_INTRTR0_OUTP_7 |
MCU_R5FSS0_CORE0_INTR_IN_132 | 132 | WKUP_GPIOMUX_INTRTR0_OUTP_8 |
MCU_R5FSS0_CORE0_INTR_IN_133 | 133 | WKUP_GPIOMUX_INTRTR0_OUTP_9 |
MCU_R5FSS0_CORE0_INTR_IN_134 | 134 | WKUP_GPIOMUX_INTRTR0_OUTP_10 |
MCU_R5FSS0_CORE0_INTR_IN_135 | 135 | WKUP_GPIOMUX_INTRTR0_OUTP_11 |
MCU_R5FSS0_CORE0_INTR_IN_136 | 136 | WKUP_GPIOMUX_INTRTR0_OUTP_12 |
MCU_R5FSS0_CORE0_INTR_IN_137 | 137 | WKUP_GPIOMUX_INTRTR0_OUTP_13 |
MCU_R5FSS0_CORE0_INTR_IN_138 | 138 | WKUP_GPIOMUX_INTRTR0_OUTP_14 |
MCU_R5FSS0_CORE0_INTR_IN_139 | 139 | WKUP_GPIOMUX_INTRTR0_OUTP_15 |
MCU_R5FSS0_CORE0_INTR_IN_140 | 140 | ESM0_ESM_INT_LOW_LVL_0 |
MCU_R5FSS0_CORE0_INTR_IN_141 | 141 | ESM0_ESM_INT_HI_LVL_0 |
MCU_R5FSS0_CORE0_INTR_IN_142 | 142 | ESM0_ESM_INT_CFG_LVL_0 |
MCU_R5FSS0_CORE0_INTR_IN_144 | 144 | COMPUTE_CLUSTERHP0_GIC_OUTPUT_WAKER_GIC_PWR0_WAKE_REQUEST_0 |
MCU_R5FSS0_CORE0_INTR_IN_145 | 145 | COMPUTE_CLUSTERHP0_GIC_OUTPUT_WAKER_GIC_PWR0_WAKE_REQUEST_1 |
MCU_R5FSS0_CORE0_INTR_IN_146 | 146 | MCU_R5FSS0_CORE0_EXP_INTR_0 |
MCU_R5FSS0_CORE0_INTR_IN_147 | 147 | MCU_R5FSS0_CORE1_EXP_INTR_0 |
MCU_R5FSS0_CORE0_INTR_IN_148 | 148 | MCU_CBASS0_DEFAULT_ERR_INTR_0 |
MCU_R5FSS0_CORE0_INTR_IN_149 | 149 | GLUELOGIC_DBG_CBASS_INTR_OR_GLUE_DBG_CBASS_AGG_ERR_INTR_0 |
MCU_R5FSS0_CORE0_INTR_IN_150 | 150 | GLUELOGIC_FW_CBASS_INTR_OR_GLUE_FW_CBASS_AGG_ERR_INTR_0 |
MCU_R5FSS0_CORE0_INTR_IN_151 | 151 | WKUP_CBASS0_DEFAULT_ERR_INTR_0 |
MCU_R5FSS0_CORE0_INTR_IN_156 | 156 | WKUP_VTM0_COMMON_0_THERM_LVL_GT_TH1_INTR_0 |
MCU_R5FSS0_CORE0_INTR_IN_157 | 157 | WKUP_VTM0_COMMON_0_THERM_LVL_LT_TH0_INTR_0 |
MCU_R5FSS0_CORE0_INTR_IN_158 | 158 | WKUP_VTM0_COMMON_0_THERM_LVL_GT_TH2_INTR_0 |
MCU_R5FSS0_CORE0_INTR_IN_160 | 160 | MAIN2MCU_LVL_INTRTR0_OUTL_0 |
MCU_R5FSS0_CORE0_INTR_IN_161 | 161 | MAIN2MCU_LVL_INTRTR0_OUTL_1 |
MCU_R5FSS0_CORE0_INTR_IN_162 | 162 | MAIN2MCU_LVL_INTRTR0_OUTL_2 |
MCU_R5FSS0_CORE0_INTR_IN_163 | 163 | MAIN2MCU_LVL_INTRTR0_OUTL_3 |
MCU_R5FSS0_CORE0_INTR_IN_164 | 164 | MAIN2MCU_LVL_INTRTR0_OUTL_4 |
MCU_R5FSS0_CORE0_INTR_IN_165 | 165 | MAIN2MCU_LVL_INTRTR0_OUTL_5 |
MCU_R5FSS0_CORE0_INTR_IN_166 | 166 | MAIN2MCU_LVL_INTRTR0_OUTL_6 |
MCU_R5FSS0_CORE0_INTR_IN_167 | 167 | MAIN2MCU_LVL_INTRTR0_OUTL_7 |
MCU_R5FSS0_CORE0_INTR_IN_168 | 168 | MAIN2MCU_LVL_INTRTR0_OUTL_8 |
MCU_R5FSS0_CORE0_INTR_IN_169 | 169 | MAIN2MCU_LVL_INTRTR0_OUTL_9 |
MCU_R5FSS0_CORE0_INTR_IN_170 | 170 | MAIN2MCU_LVL_INTRTR0_OUTL_10 |
MCU_R5FSS0_CORE0_INTR_IN_171 | 171 | MAIN2MCU_LVL_INTRTR0_OUTL_11 |
MCU_R5FSS0_CORE0_INTR_IN_172 | 172 | MAIN2MCU_LVL_INTRTR0_OUTL_12 |
MCU_R5FSS0_CORE0_INTR_IN_173 | 173 | MAIN2MCU_LVL_INTRTR0_OUTL_13 |
MCU_R5FSS0_CORE0_INTR_IN_174 | 174 | MAIN2MCU_LVL_INTRTR0_OUTL_14 |
MCU_R5FSS0_CORE0_INTR_IN_175 | 175 | MAIN2MCU_LVL_INTRTR0_OUTL_15 |
MCU_R5FSS0_CORE0_INTR_IN_176 | 176 | MAIN2MCU_LVL_INTRTR0_OUTL_16 |
MCU_R5FSS0_CORE0_INTR_IN_177 | 177 | MAIN2MCU_LVL_INTRTR0_OUTL_17 |
MCU_R5FSS0_CORE0_INTR_IN_178 | 178 | MAIN2MCU_LVL_INTRTR0_OUTL_18 |
MCU_R5FSS0_CORE0_INTR_IN_179 | 179 | MAIN2MCU_LVL_INTRTR0_OUTL_19 |
MCU_R5FSS0_CORE0_INTR_IN_180 | 180 | MAIN2MCU_LVL_INTRTR0_OUTL_20 |
MCU_R5FSS0_CORE0_INTR_IN_181 | 181 | MAIN2MCU_LVL_INTRTR0_OUTL_21 |
MCU_R5FSS0_CORE0_INTR_IN_182 | 182 | MAIN2MCU_LVL_INTRTR0_OUTL_22 |
MCU_R5FSS0_CORE0_INTR_IN_183 | 183 | MAIN2MCU_LVL_INTRTR0_OUTL_23 |
MCU_R5FSS0_CORE0_INTR_IN_184 | 184 | MAIN2MCU_LVL_INTRTR0_OUTL_24 |
MCU_R5FSS0_CORE0_INTR_IN_185 | 185 | MAIN2MCU_LVL_INTRTR0_OUTL_25 |
MCU_R5FSS0_CORE0_INTR_IN_186 | 186 | MAIN2MCU_LVL_INTRTR0_OUTL_26 |
MCU_R5FSS0_CORE0_INTR_IN_187 | 187 | MAIN2MCU_LVL_INTRTR0_OUTL_27 |
MCU_R5FSS0_CORE0_INTR_IN_188 | 188 | MAIN2MCU_LVL_INTRTR0_OUTL_28 |
MCU_R5FSS0_CORE0_INTR_IN_189 | 189 | MAIN2MCU_LVL_INTRTR0_OUTL_29 |
MCU_R5FSS0_CORE0_INTR_IN_190 | 190 | MAIN2MCU_LVL_INTRTR0_OUTL_30 |
MCU_R5FSS0_CORE0_INTR_IN_191 | 191 | MAIN2MCU_LVL_INTRTR0_OUTL_31 |
MCU_R5FSS0_CORE0_INTR_IN_192 | 192 | MAIN2MCU_LVL_INTRTR0_OUTL_32 |
MCU_R5FSS0_CORE0_INTR_IN_193 | 193 | MAIN2MCU_LVL_INTRTR0_OUTL_33 |
MCU_R5FSS0_CORE0_INTR_IN_194 | 194 | MAIN2MCU_LVL_INTRTR0_OUTL_34 |
MCU_R5FSS0_CORE0_INTR_IN_195 | 195 | MAIN2MCU_LVL_INTRTR0_OUTL_35 |
MCU_R5FSS0_CORE0_INTR_IN_196 | 196 | MAIN2MCU_LVL_INTRTR0_OUTL_36 |
MCU_R5FSS0_CORE0_INTR_IN_197 | 197 | MAIN2MCU_LVL_INTRTR0_OUTL_37 |
MCU_R5FSS0_CORE0_INTR_IN_198 | 198 | MAIN2MCU_LVL_INTRTR0_OUTL_38 |
MCU_R5FSS0_CORE0_INTR_IN_199 | 199 | MAIN2MCU_LVL_INTRTR0_OUTL_39 |
MCU_R5FSS0_CORE0_INTR_IN_200 | 200 | MAIN2MCU_LVL_INTRTR0_OUTL_40 |
MCU_R5FSS0_CORE0_INTR_IN_201 | 201 | MAIN2MCU_LVL_INTRTR0_OUTL_41 |
MCU_R5FSS0_CORE0_INTR_IN_202 | 202 | MAIN2MCU_LVL_INTRTR0_OUTL_42 |
MCU_R5FSS0_CORE0_INTR_IN_203 | 203 | MAIN2MCU_LVL_INTRTR0_OUTL_43 |
MCU_R5FSS0_CORE0_INTR_IN_204 | 204 | MAIN2MCU_LVL_INTRTR0_OUTL_44 |
MCU_R5FSS0_CORE0_INTR_IN_205 | 205 | MAIN2MCU_LVL_INTRTR0_OUTL_45 |
MCU_R5FSS0_CORE0_INTR_IN_206 | 206 | MAIN2MCU_LVL_INTRTR0_OUTL_46 |
MCU_R5FSS0_CORE0_INTR_IN_207 | 207 | MAIN2MCU_LVL_INTRTR0_OUTL_47 |
MCU_R5FSS0_CORE0_INTR_IN_208 | 208 | MAIN2MCU_LVL_INTRTR0_OUTL_48 |
MCU_R5FSS0_CORE0_INTR_IN_209 | 209 | MAIN2MCU_LVL_INTRTR0_OUTL_49 |
MCU_R5FSS0_CORE0_INTR_IN_210 | 210 | MAIN2MCU_LVL_INTRTR0_OUTL_50 |
MCU_R5FSS0_CORE0_INTR_IN_211 | 211 | MAIN2MCU_LVL_INTRTR0_OUTL_51 |
MCU_R5FSS0_CORE0_INTR_IN_212 | 212 | MAIN2MCU_LVL_INTRTR0_OUTL_52 |
MCU_R5FSS0_CORE0_INTR_IN_213 | 213 | MAIN2MCU_LVL_INTRTR0_OUTL_53 |
MCU_R5FSS0_CORE0_INTR_IN_214 | 214 | MAIN2MCU_LVL_INTRTR0_OUTL_54 |
MCU_R5FSS0_CORE0_INTR_IN_215 | 215 | MAIN2MCU_LVL_INTRTR0_OUTL_55 |
MCU_R5FSS0_CORE0_INTR_IN_216 | 216 | MAIN2MCU_LVL_INTRTR0_OUTL_56 |
MCU_R5FSS0_CORE0_INTR_IN_217 | 217 | MAIN2MCU_LVL_INTRTR0_OUTL_57 |
MCU_R5FSS0_CORE0_INTR_IN_218 | 218 | MAIN2MCU_LVL_INTRTR0_OUTL_58 |
MCU_R5FSS0_CORE0_INTR_IN_219 | 219 | MAIN2MCU_LVL_INTRTR0_OUTL_59 |
MCU_R5FSS0_CORE0_INTR_IN_220 | 220 | MAIN2MCU_LVL_INTRTR0_OUTL_60 |
MCU_R5FSS0_CORE0_INTR_IN_221 | 221 | MAIN2MCU_LVL_INTRTR0_OUTL_61 |
MCU_R5FSS0_CORE0_INTR_IN_222 | 222 | MAIN2MCU_LVL_INTRTR0_OUTL_62 |
MCU_R5FSS0_CORE0_INTR_IN_223 | 223 | MAIN2MCU_LVL_INTRTR0_OUTL_63 |
MCU_R5FSS0_CORE0_INTR_IN_224 | 224 | MAIN2MCU_PLS_INTRTR0_OUTP_0 |
MCU_R5FSS0_CORE0_INTR_IN_225 | 225 | MAIN2MCU_PLS_INTRTR0_OUTP_1 |
MCU_R5FSS0_CORE0_INTR_IN_226 | 226 | MAIN2MCU_PLS_INTRTR0_OUTP_2 |
MCU_R5FSS0_CORE0_INTR_IN_227 | 227 | MAIN2MCU_PLS_INTRTR0_OUTP_3 |
MCU_R5FSS0_CORE0_INTR_IN_228 | 228 | MAIN2MCU_PLS_INTRTR0_OUTP_4 |
MCU_R5FSS0_CORE0_INTR_IN_229 | 229 | MAIN2MCU_PLS_INTRTR0_OUTP_5 |
MCU_R5FSS0_CORE0_INTR_IN_230 | 230 | MAIN2MCU_PLS_INTRTR0_OUTP_6 |
MCU_R5FSS0_CORE0_INTR_IN_231 | 231 | MAIN2MCU_PLS_INTRTR0_OUTP_7 |
MCU_R5FSS0_CORE0_INTR_IN_232 | 232 | MAIN2MCU_PLS_INTRTR0_OUTP_8 |
MCU_R5FSS0_CORE0_INTR_IN_233 | 233 | MAIN2MCU_PLS_INTRTR0_OUTP_9 |
MCU_R5FSS0_CORE0_INTR_IN_234 | 234 | MAIN2MCU_PLS_INTRTR0_OUTP_10 |
MCU_R5FSS0_CORE0_INTR_IN_235 | 235 | MAIN2MCU_PLS_INTRTR0_OUTP_11 |
MCU_R5FSS0_CORE0_INTR_IN_236 | 236 | MAIN2MCU_PLS_INTRTR0_OUTP_12 |
MCU_R5FSS0_CORE0_INTR_IN_237 | 237 | MAIN2MCU_PLS_INTRTR0_OUTP_13 |
MCU_R5FSS0_CORE0_INTR_IN_238 | 238 | MAIN2MCU_PLS_INTRTR0_OUTP_14 |
MCU_R5FSS0_CORE0_INTR_IN_239 | 239 | MAIN2MCU_PLS_INTRTR0_OUTP_15 |
MCU_R5FSS0_CORE0_INTR_IN_240 | 240 | MAIN2MCU_PLS_INTRTR0_OUTP_16 |
MCU_R5FSS0_CORE0_INTR_IN_241 | 241 | MAIN2MCU_PLS_INTRTR0_OUTP_17 |
MCU_R5FSS0_CORE0_INTR_IN_242 | 242 | MAIN2MCU_PLS_INTRTR0_OUTP_18 |
MCU_R5FSS0_CORE0_INTR_IN_243 | 243 | MAIN2MCU_PLS_INTRTR0_OUTP_19 |
MCU_R5FSS0_CORE0_INTR_IN_244 | 244 | MAIN2MCU_PLS_INTRTR0_OUTP_20 |
MCU_R5FSS0_CORE0_INTR_IN_245 | 245 | MAIN2MCU_PLS_INTRTR0_OUTP_21 |
MCU_R5FSS0_CORE0_INTR_IN_246 | 246 | MAIN2MCU_PLS_INTRTR0_OUTP_22 |
MCU_R5FSS0_CORE0_INTR_IN_247 | 247 | MAIN2MCU_PLS_INTRTR0_OUTP_23 |
MCU_R5FSS0_CORE0_INTR_IN_248 | 248 | MAIN2MCU_PLS_INTRTR0_OUTP_24 |
MCU_R5FSS0_CORE0_INTR_IN_249 | 249 | MAIN2MCU_PLS_INTRTR0_OUTP_25 |
MCU_R5FSS0_CORE0_INTR_IN_250 | 250 | MAIN2MCU_PLS_INTRTR0_OUTP_26 |
MCU_R5FSS0_CORE0_INTR_IN_251 | 251 | MAIN2MCU_PLS_INTRTR0_OUTP_27 |
MCU_R5FSS0_CORE0_INTR_IN_252 | 252 | MAIN2MCU_PLS_INTRTR0_OUTP_28 |
MCU_R5FSS0_CORE0_INTR_IN_253 | 253 | MAIN2MCU_PLS_INTRTR0_OUTP_29 |
MCU_R5FSS0_CORE0_INTR_IN_254 | 254 | MAIN2MCU_PLS_INTRTR0_OUTP_30 |
MCU_R5FSS0_CORE0_INTR_IN_255 | 255 | MAIN2MCU_PLS_INTRTR0_OUTP_31 |
MCU_R5FSS0_CORE0_INTR_IN_256 | 256 | MAIN2MCU_PLS_INTRTR0_OUTP_32 |
MCU_R5FSS0_CORE0_INTR_IN_257 | 257 | MAIN2MCU_PLS_INTRTR0_OUTP_33 |
MCU_R5FSS0_CORE0_INTR_IN_258 | 258 | MAIN2MCU_PLS_INTRTR0_OUTP_34 |
MCU_R5FSS0_CORE0_INTR_IN_259 | 259 | MAIN2MCU_PLS_INTRTR0_OUTP_35 |
MCU_R5FSS0_CORE0_INTR_IN_260 | 260 | MAIN2MCU_PLS_INTRTR0_OUTP_36 |
MCU_R5FSS0_CORE0_INTR_IN_261 | 261 | MAIN2MCU_PLS_INTRTR0_OUTP_37 |
MCU_R5FSS0_CORE0_INTR_IN_262 | 262 | MAIN2MCU_PLS_INTRTR0_OUTP_38 |
MCU_R5FSS0_CORE0_INTR_IN_263 | 263 | MAIN2MCU_PLS_INTRTR0_OUTP_39 |
MCU_R5FSS0_CORE0_INTR_IN_264 | 264 | MAIN2MCU_PLS_INTRTR0_OUTP_40 |
MCU_R5FSS0_CORE0_INTR_IN_265 | 265 | MAIN2MCU_PLS_INTRTR0_OUTP_41 |
MCU_R5FSS0_CORE0_INTR_IN_266 | 266 | MAIN2MCU_PLS_INTRTR0_OUTP_42 |
MCU_R5FSS0_CORE0_INTR_IN_267 | 267 | MAIN2MCU_PLS_INTRTR0_OUTP_43 |
MCU_R5FSS0_CORE0_INTR_IN_268 | 268 | MAIN2MCU_PLS_INTRTR0_OUTP_44 |
MCU_R5FSS0_CORE0_INTR_IN_269 | 269 | MAIN2MCU_PLS_INTRTR0_OUTP_45 |
MCU_R5FSS0_CORE0_INTR_IN_270 | 270 | MAIN2MCU_PLS_INTRTR0_OUTP_46 |
MCU_R5FSS0_CORE0_INTR_IN_271 | 271 | MAIN2MCU_PLS_INTRTR0_OUTP_47 |
MCU_R5FSS0_CORE0_INTR_IN_276 | 276 | COMPUTE_CLUSTERHP0_ARM0_CPU0_DFT_LBIST_BIST_DONE_0 |
MCU_R5FSS0_CORE0_INTR_IN_277 | 277 | COMPUTE_CLUSTERHP0_ARM0_CPU1_DFT_LBIST_BIST_DONE_0 |
MCU_R5FSS0_CORE0_INTR_IN_278 | 278 | COMPUTE_CLUSTERHP0_ARM0_CPU2_DFT_LBIST_BIST_DONE_0 |
MCU_R5FSS0_CORE0_INTR_IN_279 | 279 | COMPUTE_CLUSTERHP0_ARM0_CPU3_DFT_LBIST_BIST_DONE_0 |
MCU_R5FSS0_CORE0_INTR_IN_280 | 280 | COMPUTE_CLUSTERHP0_ARM1_CPU0_DFT_LBIST_BIST_DONE_0 |
MCU_R5FSS0_CORE0_INTR_IN_281 | 281 | COMPUTE_CLUSTERHP0_ARM1_CPU1_DFT_LBIST_BIST_DONE_0 |
MCU_R5FSS0_CORE0_INTR_IN_282 | 282 | COMPUTE_CLUSTERHP0_ARM1_CPU2_DFT_LBIST_BIST_DONE_0 |
MCU_R5FSS0_CORE0_INTR_IN_283 | 283 | COMPUTE_CLUSTERHP0_ARM1_CPU3_DFT_LBIST_BIST_DONE_0 |
MCU_R5FSS0_CORE0_INTR_IN_284 | 284 | GLUELOGIC_MAIN_PULSAR2_LBIST_GLUE_DFT_LBIST_BIST_DONE_0 |
MCU_R5FSS0_CORE0_INTR_IN_285 | 285 | GLUELOGIC_VPAC1_LBIST_GLUE_DFT_LBIST_BIST_DONE_0 |
MCU_R5FSS0_CORE0_INTR_IN_288 | 288 | COMPUTE_CLUSTERHP0_CLEC_0_SOC_EVENTS_OUT_LEVEL_8 |
MCU_R5FSS0_CORE0_INTR_IN_289 | 289 | COMPUTE_CLUSTERHP0_CLEC_0_SOC_EVENTS_OUT_LEVEL_9 |
MCU_R5FSS0_CORE0_INTR_IN_290 | 290 | COMPUTE_CLUSTERHP0_CLEC_0_MSMC_PBIST_CPU_INTR_0 |
MCU_R5FSS0_CORE0_INTR_IN_291 | 291 | COMPUTE_CLUSTERHP0_ARM0_DFT_LBIST_DFT_LBIST_BIST_DONE_0 |
MCU_R5FSS0_CORE0_INTR_IN_292 | 292 | COMPUTE_CLUSTERHP0_ARM1_DFT_LBIST_DFT_LBIST_BIST_DONE_0 |
MCU_R5FSS0_CORE0_INTR_IN_293 | 293 | COMPUTE_CLUSTERHP0_CLEC_0_SOC_EVENTS_OUT_LEVEL_12 |
MCU_R5FSS0_CORE0_INTR_IN_294 | 294 | COMPUTE_CLUSTERHP0_CLEC_0_SOC_EVENTS_OUT_LEVEL_13 |
MCU_R5FSS0_CORE0_INTR_IN_295 | 295 | COMPUTE_CLUSTERHP0_AC71_4_DFT_LBIST_DFT_LBIST_BIST_DONE_0 |
MCU_R5FSS0_CORE0_INTR_IN_296 | 296 | COMPUTE_CLUSTERHP0_AC71_5_DFT_LBIST_DFT_LBIST_BIST_DONE_0 |
MCU_R5FSS0_CORE0_INTR_IN_297 | 297 | GLUELOGIC_MAIN_PULSAR0_LBIST_GLUE_DFT_LBIST_BIST_DONE_0 |
MCU_R5FSS0_CORE0_INTR_IN_298 | 298 | GLUELOGIC_MAIN_PULSAR1_LBIST_GLUE_DFT_LBIST_BIST_DONE_0 |
MCU_R5FSS0_CORE0_INTR_IN_299 | 299 | GLUELOGIC_DMPAC_LBIST_GLUE_DFT_LBIST_BIST_DONE_0 |
MCU_R5FSS0_CORE0_INTR_IN_300 | 300 | GLUELOGIC_VPAC_LBIST_GLUE_DFT_LBIST_BIST_DONE_0 |
MCU_R5FSS0_CORE0_INTR_IN_304 | 304 | PBIST7_DFT_PBIST_CPU_0 |
MCU_R5FSS0_CORE0_INTR_IN_305 | 305 | PBIST8_DFT_PBIST_CPU_0 |
MCU_R5FSS0_CORE0_INTR_IN_306 | 306 | PBIST5_DFT_PBIST_CPU_0 |
MCU_R5FSS0_CORE0_INTR_IN_307 | 307 | PBIST3_DFT_PBIST_CPU_0 |
MCU_R5FSS0_CORE0_INTR_IN_308 | 308 | PBIST4_DFT_PBIST_CPU_0 |
MCU_R5FSS0_CORE0_INTR_IN_309 | 309 | PBIST2_DFT_PBIST_CPU_0 |
MCU_R5FSS0_CORE0_INTR_IN_310 | 310 | PBIST10_DFT_PBIST_CPU_0 |
MCU_R5FSS0_CORE0_INTR_IN_311 | 311 | PBIST14_DFT_PBIST_CPU_0 |
MCU_R5FSS0_CORE0_INTR_IN_312 | 312 | PBIST0_DFT_PBIST_CPU_0 |
MCU_R5FSS0_CORE0_INTR_IN_313 | 313 | PBIST1_DFT_PBIST_CPU_0 |
MCU_R5FSS0_CORE0_INTR_IN_314 | 314 | PBIST11_DFT_PBIST_CPU_0 |
MCU_R5FSS0_CORE0_INTR_IN_315 | 315 | PBIST13_DFT_PBIST_CPU_0 |
MCU_R5FSS0_CORE0_INTR_IN_317 | 317 | AEP_GPU_BXS464_WRAP0_DFT_EMBED_PBIST_0_DFT_PBIST_CPU_0 |
MCU_R5FSS0_CORE0_INTR_IN_318 | 318 | COMPUTE_CLUSTERHP0_AC71_6_DFT_LBIST_DFT_LBIST_BIST_DONE_0 |
MCU_R5FSS0_CORE0_INTR_IN_319 | 319 | COMPUTE_CLUSTERHP0_AC71_7_DFT_LBIST_DFT_LBIST_BIST_DONE_0 |
MCU_R5FSS0_CORE0_INTR_IN_320 | 320 | PBIST15_DFT_PBIST_CPU_0 |
MCU_R5FSS0_CORE0_INTR_IN_321 | 321 | COMPUTE_CLUSTERHP0_CLEC_0_SOC_EVENTS_OUT_LEVEL_14 |
MCU_R5FSS0_CORE0_INTR_IN_322 | 322 | COMPUTE_CLUSTERHP0_CLEC_0_SOC_EVENTS_OUT_LEVEL_15 |
MCU_R5FSS0_CORE0_INTR_IN_323 | 323 | COMPUTE_CLUSTERHP0_CLEC_0_SOC_EVENTS_OUT_LEVEL_22 |
MCU_R5FSS0_CORE0_INTR_IN_352 | 352 | COMPUTE_CLUSTERHP0_GIC_OUTPUT_WAKER_GIC_PWR0_WAKE_REQUEST_2 |
MCU_R5FSS0_CORE0_INTR_IN_353 | 353 | COMPUTE_CLUSTERHP0_GIC_OUTPUT_WAKER_GIC_PWR0_WAKE_REQUEST_3 |
MCU_R5FSS0_CORE0_INTR_IN_354 | 354 | COMPUTE_CLUSTERHP0_GIC_OUTPUT_WAKER_GIC_PWR1_WAKE_REQUEST_0 |
MCU_R5FSS0_CORE0_INTR_IN_355 | 355 | COMPUTE_CLUSTERHP0_GIC_OUTPUT_WAKER_GIC_PWR1_WAKE_REQUEST_1 |
MCU_R5FSS0_CORE0_INTR_IN_356 | 356 | COMPUTE_CLUSTERHP0_GIC_OUTPUT_WAKER_GIC_PWR1_WAKE_REQUEST_2 |
MCU_R5FSS0_CORE0_INTR_IN_357 | 357 | COMPUTE_CLUSTERHP0_GIC_OUTPUT_WAKER_GIC_PWR1_WAKE_REQUEST_3 |
MCU_R5FSS0_CORE0_INTR_IN_367 | 367 | WKUP_PSC0_PSC_ALLINT_0 |
MCU_R5FSS0_CORE0_INTR_IN_368 | 368 | PSC0_PSC_ALLINT_0 |
MCU_R5FSS0_CORE0_INTR_IN_369 | 369 | AM_BOLT_PSC_WRAP0_PSC_ALLINT_0 |
MCU_R5FSS0_CORE0_INTR_IN_370 | 370 | WKUP_SMS0_COMMON_0_SMS_IOPM_IO_SWAKEUP_INTR_0 |
MCU_R5FSS0_CORE0_INTR_IN_371 | 371 | WKUP_SMS0_COMMON_0_SMS_IOPM_IO_SWAKEUP_INTR_1 |
MCU_R5FSS0_CORE0_INTR_IN_372 | 372 | WKUP_SMS0_COMMON_0_SMS_IOPM_DEBUG_ACTIVATED_INTR_0 |
MCU_R5FSS0_CORE0_INTR_IN_373 | 373 | WKUP_SMS0_COMMON_0_SMS_IOPM_DEBUG_DEACTIVATED_INTR_0 |
MCU_R5FSS0_CORE0_INTR_IN_374 | 374 | WKUP_SMS0_COMMON_0_SMS_IOPM_DEBUG_FORCEACTIVE_INTR_0 |
MCU_R5FSS0_CORE0_INTR_IN_376 | 376 | NAVSS0_INTR_0_OUTL_INTR_400 |
MCU_R5FSS0_CORE0_INTR_IN_377 | 377 | NAVSS0_INTR_0_OUTL_INTR_401 |
MCU_R5FSS0_CORE0_INTR_IN_378 | 378 | NAVSS0_INTR_0_OUTL_INTR_402 |
MCU_R5FSS0_CORE0_INTR_IN_379 | 379 | NAVSS0_INTR_0_OUTL_INTR_403 |
MCU_R5FSS0_CORE0_INTR_IN_380 | 380 | NAVSS0_INTR_0_OUTL_INTR_404 |
MCU_R5FSS0_CORE0_INTR_IN_381 | 381 | NAVSS0_INTR_0_OUTL_INTR_405 |
MCU_R5FSS0_CORE0_INTR_IN_382 | 382 | NAVSS0_INTR_0_OUTL_INTR_406 |
MCU_R5FSS0_CORE0_INTR_IN_383 | 383 | NAVSS0_INTR_0_OUTL_INTR_407 |