SPRUJ52C june 2022 – july 2023 AM69 , AM69A , TDA4AH-Q1 , TDA4AP-Q1 , TDA4VH-Q1 , TDA4VP-Q1
The A72 cluster provides cross triggering support by implementing CoreSight Cross Trigger Interface (CTI) and Cross Trigger Matrix (CTM) modules.
Table 13-7 and Table 13-8 show the A72 CTI mapping. Note that it is the same for all A72 cores in the Compute Cluster.
CTITRIGIN | Function | Description |
---|---|---|
0 | DBGTRIGGER | Pulsed on entry to debug state |
1 | PMUIRQ | PMU generated interrupt |
2 | Reserved | Reserved |
3 | Reserved | Reserved |
4 | EXTOUT[0] | ETM external output 0 |
5 | EXTOUT[1] | ETM external output 1 |
6 | EXTOUT[2] | ETM external output 2 |
7 | EXTOUT[3] | ETM external output 3 |
CTITRIGIN | Function | Description |
---|---|---|
0 | EDBGRQ | Causes the processor to enter debug state |
1 | PMUIRQ | Causes the processor to exit debug state |
2 | CTIIRQ | CTI Interrupt |
3 | Reserved | Reserved |
4 | EXTIN[0] | ETM external input 0 |
5 | EXTIN[[1] | ETM external input 1 |
6 | EXTIN[[2] | ETM external input 2 |
7 | EXTIN[[3] | ETM external input 3 |