SPRUJ52C june 2022 – july 2023 AM69 , AM69A , TDA4AH-Q1 , TDA4AP-Q1 , TDA4VH-Q1 , TDA4VP-Q1
Table 12-450 shows the I2S signals and timing.
Signal Name | Direction | Default Value | Description |
---|---|---|---|
AIF_I2S_CLK | Input | 1'd0 | I2S clock |
AIF_I2S_DATA[3:0] | Input | 4'd0 | I2S data for up to 4*M logical channels. Number of physical channels: 1, 2, or 4 M – number of time slots: 2 or 8 |
AIF_I2S_WS | Input | 1'd0 | I2S word-select indication. In TDM mode, WS = 0 indicates channel 0. |
Figure 12-471 and Figure 12-472 show the I2S timing.