SPRUJ52C june 2022 – july 2023 AM69 , AM69A , TDA4AH-Q1 , TDA4AP-Q1 , TDA4VH-Q1 , TDA4VP-Q1
The M2C bridge performs the protocol conversion and multi-threading of the VBUSM.C interface from the internal VBUSM interfaces. It also handles the cacheline conversion of the write data.
A VBUSM.C write with a dtype of 1 (CPU instruction) will be converted to a VBUSM write with a dtype of 0 (CPU data), as this condition is allowed in VBUSM.C but not in VBUSM.