SPRUJ52C june 2022 – july 2023 AM69 , AM69A , TDA4AH-Q1 , TDA4AP-Q1 , TDA4VH-Q1 , TDA4VP-Q1
Not all timer inputs and outputs are pinned out of the device. Through the timer I/O muxing registers, the inputs and outputs of each TIMER module in a domain can be made available on the TIMER IO device pads in that same domain.
Each TIMER module input in a domain can be configured to be driven by one of the TIMER IO pads in that domain through the corresponding bits in the TIMERx_CTRL registers.
Additionally, each of the TIMER IO pads in a domain can be configured to be driven by any of the TIMER module outputs in that domain through the corresponding bits in the TIMERIOx_CTRL registers.
For more information about each timer, see Section 12.9.3Timers.