SPRUJ52C june 2022 – july 2023 AM69 , AM69A , TDA4AH-Q1 , TDA4AP-Q1 , TDA4VH-Q1 , TDA4VP-Q1
The cpsw_9xuss SGMII ports [2:1] are connected to both SERDES1 and SERDES2, and ports [8:5] are connected to both SERDES2 and SERDES4. The CPSW_SERDES_MUX implements the mapping shown in Table 12-201.
CPSW_9XUSS channel | MAIN_CTRL_MMR SERDES Register Setting | SERDES Connection |
---|---|---|
1 | SERDES2_LN2_CTRL_lane_func_sel[x0],[11] | SERDES1.ip1_LN2 |
1 | SERDES2_LN2_CTRL_lane_func_sel[01] | SERDES2.ip2_LN2 |
2 | SERDES2_LN3_CTRL_lane_func_sel[00],[11] | SERDES1.ip1_LN3 |
2 | SERDES2_LN3_CTRL_lane_func_sel[01] | SERDES2.ip2_LN3 |
3 | - | SERDES1.ip1_LN0 |
4 | - | SERDES1.ip1_LN1 |
5 | SERDES4_LN0_CTRL_lane_func_sel[x0],[11] | SERDES2.ip1_LN0 |
SERDES4_LN0_CTRL_lane_func_sel[01] | SERDES4.ip2_LN0 | |
6 | SERDES4_LN1_CTRL_lane_func_sel[x0],[11] | SERDES2.ip1_LN1 |
SERDES4_LN1_CTRL_lane_func_sel[01] | SERDES4.ip2_LN1 | |
7 | SERDES4_LN2_CTRL_lane_func_sel[x0],[11] | SERDES2.ip1_LN2 |
SERDES4_LN2_CTRL_lane_func_sel[01] | SERDES4.ip2_LN2 | |
8 | SERDES4_LN3_CTRL_lane_func_sel[x0],[11] | SERDES2.ip1_LN3 |
SERDES4_LN3_CTRL_lane_func_sel[01] | SERDES4.ip2_LN3 |