SPRUJ52C june 2022 – july 2023 AM69 , AM69A , TDA4AH-Q1 , TDA4AP-Q1 , TDA4VH-Q1 , TDA4VP-Q1
In the same way that PRGs control and provide output from the POKs, the VTM controls and outputs signals from several temperature sensors that are spread around the die. The VTM provides three interrupts / ESM inputs to the system as well as a warm reset.
The temperature sensor is configured to run off a clock frequency between 1.15MHz and 1.25MHz. The frequency is obtained by dividing-down HFOSC0 or the internal RC clock; the expected usage is that the temperature sensors use HFOSC0 (TSENS_CLK_DIV is the divider). The temperature sensor will sample the temperature on a period defined by VTM_VTM_SAMPLE_CTRL.
When the temperature sensor is enabled, it senses the temperature and reports the temperature as a 10-bit value.
Each of these comparisons can be individually enabled (VTM_VTM_TMPSENS_CTRL_j and VTM_VTM_TMPSENS_CTRL_j within mmr_vbusp_cfg2). Additionally, each temperature sensor has status bits for these comparator outputs in VTM_VTM_TMPSENS_STAT_j.
The comparator functionality that drives the interrupts and warm reset work only when the sensor is configured for continuous mode; continuous operation becomes a de facto requirement (and is set in VTM_VTM_TMPSENS_CTRL_j[4].CONT within mmr_vbusp_cfg2 – that is, the mode is set for each temperature sensor).
Interrupts / ESM inputs:
The comparator thresholds shall always configured so that TH2 > TH1 > TH0. The concept is:
LT_TH0_INT, if enabled, will get triggered always when the temperature being read is less than TH0, regardless of whether TH1 interrupt and TH2 interrupt are enabled or have ever been triggered. Therefore if TH0 interrupt is generated, then firmware/software is responsible to enable the TH0 interrupt only as part of the interrupt service routine of TH1 and TH2. Otherwise it will keep triggering when is not needed.
Warm Reset input:
Similar to the interrupts / ESM inputs, the warm reset generation is triggered off a threshold defined in VTM_VTM_MISC_CTRL2[9-0] MAXT_OUTRG_ALERT_THR. The reset will be released when the compared temperature drops below VTM_VTM_MISC_CTRL2[25-16] MAXT_OUTRG_ALERT_THR0.
VTM muxing of the temperature comparisons:
The VTM is configured by voltage domains. At this level, all the interrupt / ESM inputs from each temperature sensor can be enabled or disabled; as an example, the comparator outputs from temperature sensor 0 can be ignored in voltage domain 0. The enable is configured with the VTM_VTM_VD_EVT_SEL_SET_j and VTM_VTM_VD_EVT_SEL_CLR_j registers. At the voltage domain-level, the enabled comparator results are combined by interrupt / ESM signal. The combined comparator result can be observed in VTM_VTM_VD_EVT_STAT_j.
Register Group | Voltage Domain |
---|---|
WKUP_VTM_*_VD_*_0 | VDD_MCU |
WKUP_VTM_*_VD_*_1 | VDD_CORE |
WKUP_VTM_*_VD_*_2 | VDD_CPU_AVS |
others | Unused |
After the temperature sensors are combined at a voltage domain level, the outputs from each voltage domain are enabled at the top level of the VTM with VTM_VTM_GT_TH2_INT_EN_SET / VTM_VTM_GT_TH2_INT_EN_CLR, VTM_VTM_GT_TH1_INT_EN_SET / VTM_VTM_GT_TH1_INT_EN_CLR, and VTM_VTM_LT_TH0_INT_EN_SET / VTM_VTM_LT_TH0_INT_EN_CLR. At this top level of the VTM, the status of these signals is checked and cleared with VTM_VTM_GT_TH2_INT_RAW_STAT_SET / VTM_VTM_GT_TH2_INT_EN_STAT_CLR, VTM_VTM_GT_TH1_INT_RAW_STAT_SET / VTM_VTM_GT_TH1_INT_EN_STAT_CLR, and VTM_VTM_LT_TH0_INT_RAW_STAT_SET / VTM_VTM_LT_TH0_INT_EN_STAT_CLR.
VTM control of the global comparison that generates a warm reset:
The global comparison that generates a warm rest is enabled at each temperatures sensor with WKUP_VTM_TMPSENS_CTRL_j[11] within mmr_vbusp_cfg2. Additionally, there is a global enable for this signal in WKUP_VTM_MISC_CTRL[0].
AVS voltage definition:
The VTM also contains the Adaptive Voltage Scaling (AVS) voltage for the VDD_CPU domain. Since the VDD_CPU domain is defined by voltage domain 2, the registers of interest are VTM_VTM_VD_DEVINFO_2 and VTM_VTM_VD_OPPVID_2. If VTM_VTM_VD_DEVINFO_2[12] AVS0_SUP is set, then the device should set the voltage defined in VTM_VTM_VD_OPPVID_2[15-8] OPP_1. The voltage is encoded according to the table below:
BUCKn_VSETn | Output Voltage [V] 20 mV steps |
BUCKn_VSETn | Output Voltage [V] 5 mV steps |
BUCKn_VSETn | Output Voltage [V] 5 mV steps |
BUCKn_VSETn | Output Voltage [V] 10 mV steps |
BUCKn_VSETn | Output Voltage [V] 20 mV steps |
BUCKn_VSETn | Output Voltage [V] 20 mV steps |
---|---|---|---|---|---|---|---|---|---|---|---|
0x00 | 0.3 | 0x0F | 0.6 | 0x41 | 0.85 | 0x73 | 1.1 | 0xAB | 1.66 | 0xD6 | 2.52 |
0x01 | 0.32 | 0x10 | 0.605 | 0x42 | 0.855 | 0x74 | 1.11 | 0xAC | 1.68 | 0xD7 | 2.54 |
0x02 | 0.34 | 0x11 | 0.61 | 0x43 | 0.86 | 0x75 | 1.12 | 0xAD | 1.7 | 0xD8 | 2.56 |
0x03 | 0.36 | 0x12 | 0.615 | 0x44 | 0.865 | 0x76 | 1.13 | 0xAE | 1.72 | 0xD9 | 2.58 |
0x04 | 0.38 | 0x13 | 0.62 | 0x45 | 0.87 | 0x77 | 1.14 | 0xAF | 1.74 | 0xDA | 2.6 |
0x05 | 0.4 | 0x14 | 0.625 | 0x46 | 0.875 | 0x78 | 1.15 | 0xB0 | 1.76 | 0xDB | 2.62 |
0x06 | 0.42 | 0x15 | 0.63 | 0x47 | 0.88 | 0x79 | 1.16 | 0xB1 | 1.78 | 0xDC | 2.64 |
0x07 | 0.44 | 0x16 | 0.635 | 0x48 | 0.885 | 0x7A | 1.17 | 0xB2 | 1.8 | 0xDD | 2.66 |
0x08 | 0.46 | 0x17 | 0.64 | 0x49 | 0.89 | 0x7B | 1.18 | 0xB3 | 1.82 | 0xDE | 2.68 |
0x09 | 0.48 | 0x18 | 0.645 | 0x4A | 0.895 | 0x7C | 1.19 | 0xB4 | 1.84 | 0xDF | 2.7 |
0x0A | 0.5 | 0x19 | 0.65 | 0x4B | 0.9 | 0x7D | 1.2 | 0xB5 | 1.86 | 0xE0 | 2.72 |
0x0B | 0.52 | 0x1A | 0.655 | 0x4C | 0.905 | 0x7E | 1.21 | 0xB6 | 1.88 | 0xE1 | 2.74 |
0x0C | 0.54 | 0x1B | 0.66 | 0x4D | 0.91 | 0x7F | 1.22 | 0xB7 | 1.9 | 0xE2 | 2.76 |
0x0D | 0.56 | 0x1C | 0.665 | 0x4E | 0.915 | 0x80 | 1.23 | 0xB8 | 1.92 | 0xE3 | 2.78 |
0x0E | 0.58 | 0x1D | 0.67 | 0x4F | 0.92 | 0x81 | 1.24 | 0xB9 | 1.94 | 0xE4 | 2.8 |
0x1E | 0.675 | 0x50 | 0.925 | 0x82 | 1.25 | 0xBA | 1.96 | 0xE5 | 2.82 | ||
0x1F | 0.68 | 0x51 | 0.93 | 0x83 | 1.26 | 0xBB | 1.98 | 0xE6 | 2.84 | ||
0x20 | 0.685 | 0x52 | 0.935 | 0x84 | 1.27 | 0xBC | 2 | 0xE7 | 2.86 | ||
0x21 | 0.69 | 0x53 | 0.94 | 0x85 | 1.28 | 0xBD | 2.02 | 0xE8 | 2.88 | ||
0x22 | 0.695 | 0x54 | 0.945 | 0x86 | 1.29 | 0xBE | 2.04 | 0xE9 | 2.9 | ||
0x23 | 0.7 | 0x55 | 0.95 | 0x87 | 1.3 | 0xBF | 2.06 | 0xEA | 2.92 | ||
0x24 | 0.705 | 0x56 | 0.955 | 0x88 | 1.31 | 0xC0 | 2.08 | 0xEB | 2.94 | ||
0x25 | 0.71 | 0x57 | 0.96 | 0x89 | 1.32 | 0xC1 | 2.1 | 0xEC | 2.96 | ||
0x26 | 0.715 | 0x58 | 0.965 | 0x8A | 1.33 | 0xC2 | 2.12 | 0xED | 2.98 | ||
0x27 | 0.72 | 0x59 | 0.97 | 0x8B | 1.34 | 0xC3 | 2.14 | 0xEE | 3.0 | ||
0x28 | 0.725 | 0x5A | 0.975 | 0x8C | 1.35 | 0xC4 | 2.16 | 0xEF | 3.02 | ||
0x29 | 0.73 | 0x5B | 0.98 | 0x8D | 1.36 | 0xC5 | 2.18 | 0xF0 | 3.04 | ||
0x2A | 0.735 | 0x5C | 0.985 | 0x8E | 1.37 | 0xC6 | 2.2 | 0xF1 | 3.06 | ||
0x2B | 0.74 | 0x5D | 0.99 | 0x8F | 1.38 | 0xC7 | 2.22 | 0xF2 | 3.08 | ||
0x2C | 0.745 | 0x5E | 0.995 | 0x90 | 1.39 | 0xC8 | 2.24 | 0xF3 | 3.1 | ||
0x2D | 0.75 | 0x5F | 1.0 | 0x91 | 1.4 | 0xC9 | 2.26 | 0xF4 | 3.12 | ||
0x2E | 0.755 | 0x60 | 1.005 | 0x92 | 1.41 | 0xCA | 2.28 | 0xF5 | 3.14 | ||
0x2F | 0.76 | 0x61 | 1.01 | 0x93 | 1.42 | 0xCB | 2.3 | 0xF6 | 3.16 | ||
0x30 | 0.765 | 0x62 | 1.015 | 0x94 | 1.43 | 0xCC | 2.32 | 0xF7 | 3.18 | ||
0x31 | 0.77 | 0x63 | 1.02 | 0x95 | 1.44 | 0xCD | 2.34 | 0xF8 | 3.2 | ||
0x32 | 0.775 | 0x64 | 1.025 | 0x96 | 1.45 | 0xCE | 2.36 | 0xF9 | 3.22 | ||
0x33 | 0.78 | 0x65 | 1.03 | 0x97 | 1.46 | 0xCF | 2.38 | 0xFA | 3.24 | ||
0x34 | 0.785 | 0x66 | 1.035 | 0x98 | 1.47 | 0xD0 | 2.4 | 0xFB | 3.26 | ||
0x35 | 0.79 | 0x67 | 1.04 | 0x99 | 1.48 | 0xD1 | 2.42 | 0xFC | 3.28 | ||
0x36 | 0.795 | 0x68 | 1.045 | 0x9A | 1.49 | 0xD2 | 2.44 | 0xFD | 3.3 | ||
0x37 | 0.8 | 0x69 | 1.05 | 0x9B | 1.5 | 0xD3 | 2.46 | 0xFE | 3.32 | ||
0x38 | 0.805 | 0x6A | 1.055 | 0x9C | 1.51 | 0xD4 | 2.48 | 0xFF | 3.34 | ||
0x39 | 0.81 | 0x6B | 1.06 | 0x9D | 1.52 | 0xD5 | 2.5 | ||||
0x3A | 0.815 | 0x6C | 1.065 | 0x9E | 1.53 | ||||||
0x3B | 0.82 | 0x6D | 1.07 | 0x9F | 1.54 | ||||||
0x3C | 0.825 | 0x6E | 1.075 | 0xA0 | 1.55 | ||||||
0x3D | 0.83 | 0x6F | 1.08 | 0xA1 | 1.56 | ||||||
0x3E | 0.835 | 0x70 | 1.085 | 0xA2 | 1.57 | ||||||
0x3F | 0.84 | 0x71 | 1.09 | 0xA3 | 1.58 | ||||||
0x40 | 0.845 | 0x72 | 1.095 | 0xA4 | 1.59 | ||||||
0xA5 | 1.6 | ||||||||||
0xA6 | 1.61 | ||||||||||
0xA7 | 1.62 | ||||||||||
0xA8 | 1.63 | ||||||||||
0xA9 | 1.64 | ||||||||||
0xAA | 1.65 |