Note: Refer to the DDRSS Registers section of the DRA821 TRM (
https://www.ti.com/lit/pdf/spruiu1) for register offset information to
be combined with the base address listed below (where applicable for this
Device):
- DDRSS0 = 0x02990000
- DDRSS1 = 0x029B0000
- DDRSS2 = 0x029D0000
- DDRSS3 = 0x029F0000