The EDP wrapper supports up to 6 DPI inputs and internally maps 4 of them to the MHDPTX module, which can support up to 4-stream transmission in Multiple Stream Transport (MST) mode.
Each DPI interface supports the following:
- CEA-861 signaling/timing compatible interface
- Pixel clock rate range from 25MHz to 600MHz
- Frame Resolution - 4K@60Hz equivalent frame size – supporting various frame resolutions and aspect ratios that are equivalent to 4Kx2K@60Hz UHD (Ultra High Definition – 4096x2160 pixels)
- Progressive video timing only
- Maximum Width - 8x1024 pixels wide
- RGB (or YUV444) format only
Table 12-447 describes the DPI interface signals at EDP Wrapper boundary.
Table 12-447 EDP Wrapper DPI Interface SignalsSignal Name(1) | Direction | Default Value | Description |
---|
dpi_n_data[47:0] | Input | 48'd0 | Pixel Data |
dpi_n_m_mdata[47:0] | Input | 48'd0 | Master Meta Data Only bit [10] secure mode bit is used |
dpi_n_de | Input | 1'd0 | Data Enable (active high) |
dpi_n_vs | Input | 1'd0 | Start of frame or Vsync (active low) |
dpi_n_hs | Input | 1'd0 | Start of line or Hsync (active low) |
(1) n = 0 to 5
Figure 12-467 shows the DPI data mapping to VIF ports via muxing in the EDP wrapper.
The following data stream transport modes are supported by the DPI data mapping to VIF ports:
SST Mode (Single Stream Transport) – VIF0 used
- DPI_2 - Single Panel Input (optional DSC compression) mapped to VIF0
- DPI_2/DPI_3 - Split Panel Dual Inputs (for DSC compression only) mapped to VIF0 (via DSC) (see Note 1)
MST Mode (Multi-Stream Transport) – All VIFs used
- DPI_2 - Single Panel Input (optional DSC compression) mapped to VIF0
- DPI_3 - Single Panel Input (optional DSC compression in dual panel mode) mapped to VIF1 (see Note 2 and Note 3)
- DPI_2/DPI_3 - Split Panel Dual Inputs (for DSC compression only - two L/R streams compressed separately but outputs combined as one stream) with compressed output mapped to VIF0 (via DSC)
- DPI_2 or DPI_4 - Single Panel Input (no DSC compression) mapped to VIF2
- DPI_3 or DPI_5 - Single Panel Input (no DSC compression) mapped to VIF3
Notes:
- DSC can be enabled to perform compression on a single input stream as Left and Right panel data for high resolution video (pixel clock > ~400 MHz) that cannot be compressed with a single DSC encoder. In this mode, two input streams share the same video timing (vs/hs/de) and identical input pixel clocks. This mode is referred to as "split panel mode".
- DSC can also be enabled to perform compression of two unrelated input streams of the same resolution. These streams must share the same pixel input clock since the DSC encoders require two encoder clocks to be synchronous. But, in this case, two streams can be asynchronous in terms of video timing (vs/hs/de). This mode is also referred to as "dual panel mode".
- When DSC is using only one encoder, then it is required to be on Enc0 input (meaning the stream to be compressed must be on DPI_2). In MST mode (where this constraint is applicable), the single stream that is to be compressed must be placed on DPI_2 and therefore the DP sink device (that receives the compressed stream) will be assigned to receive the STREAM_0.
When DSC is in split or dual panel mode, the DSS uses a common clock to send two streams. In the EDP, two DSC input clocks are sourced from the same DPI_2 source clock to keep these clocks to be the same (per DSC requirement) in order to minimize the skew between two DSC encoder clocks.
For detailed description of the clock diagrams, including the clock muxes per data selection, refer to Section 12.6.5.5.1, Clock Diagram.