SPRUJ52C june 2022 – july 2023 AM69 , AM69A , TDA4AH-Q1 , TDA4AP-Q1 , TDA4VH-Q1 , TDA4VP-Q1
The target debug interface has the following signals:
Table 13-1 describes the JTAG interface signals.
Signal Name | I/O Type(1) | Description |
---|---|---|
TRSTn | I | Test Reset. Iinitializes and disables the test interface. |
TCK | I | Test Clock. Controls the timing of the test interface independently from any system clocks. TCK is pulsed by the equipment controlling the test and not by the tested device. |
TMS | I | Test Mode Select. Controls the transitions of the test interface state machine. |
TDI | I | Test Data Input. Supplies the data to the JTAG registers. |
TDO | O/Z | Test Data Output. Used to serially output the data from the JTAG registers to the equipment controlling the test. |
EMU0 | I/O | TI legacy channel 0 trigger or boot mode select |
EMU1 | I/O | TI legacy channel 1 trigger or boot mode select |
For information about JTAG internal pullup/pulldown resistors and electrical data and timing parameters, see the device Data Manual.
The JTAG ID code for the device is .