SPRUJ52C june 2022 – july 2023 AM69 , AM69A , TDA4AH-Q1 , TDA4AP-Q1 , TDA4VH-Q1 , TDA4VP-Q1
In Figure 12-237, the Phase control feature of the APWM mode is used to control a 3 phase Interleaved DC/DC converter topology. This topology requires each phase to be off-set by 120° from each other. Hence if "Leg" 1 (controlled by APWM1) is the reference Leg (or phase), that is, 0°, then Leg 2 need 120° off-set and Leg 3 needs 240° off-set. The waveforms in Figure 12-237 show the timing relationship between each of the phases (Legs). Note ECAP1 module is the Master and issues a SyncOut pulse to the slaves (modules 2, 3) whenever TSCTR = Period value.
Register | Bit | Value |
---|---|---|
CAP1 | CAP1 | 1200 |
CTRPHS | CTRPHS | 0 |
ECCTL2 | CAP_APWM | EC_APWM_MODE |
ECCTL2 | APWMPOL | EC_ACTV_HI |
ECCTL2 | SYNCI_EN | EC_DISABLE |
ECCTL2 | SYNCO_SEL | EC_CTR_PRD |
ECCTL2 | TSCTRSTOP | EC_RUN |
Register | Bit | Value |
---|---|---|
CAP1 | CAP1 | 1200 |
CTRPHS | CTRPHS | 800 |
ECCTL2 | CAP_APWM | EC_APWM_MODE |
ECCTL2 | APWMPOL | EC_ACTV_HI |
ECCTL2 | SYNCI_EN | EC_ENABLE |
ECCTL2 | SYNCO_SEL | EC_SYNCI |
ECCTL2 | TSCTRSTOP | EC_RUN |
Register | Bit | Value |
---|---|---|
CAP1 | CAP1 | 1200 |
CTRPHS | CTRPHS | 400 |
ECCTL2 | CAP_APWM | EC_APWM_MODE |
ECCTL2 | APWMPOL | EC_ACTV_HI |
ECCTL2 | SYNCI_EN | EC_ENABLE |
ECCTL2 | SYNCO_SEL | EC_SYNCO_DIS |
ECCTL2 | TSCTRSTOP | EC_RUN |