SPRUJ83D December 2023 – January 2026 AM62P , AM62P-Q1
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| Instance Name | Physical Address |
|---|---|
| DDR32SS0 | 0F30 C0B8h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| PHY_LPBK_RESULT_OBS_0 | |||||||
| R | |||||||
| 100000h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| PHY_LPBK_RESULT_OBS_0 | |||||||
| R | |||||||
| 100000h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| PHY_LPBK_RESULT_OBS_0 | |||||||
| R | |||||||
| 100000h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| PHY_LPBK_RESULT_OBS_0 | |||||||
| R | |||||||
| 100000h | |||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:0 | PHY_LPBK_RESULT_OBS_0 | R | 100000h | Observation register containing loopback status/results for slice 0. READ-ONLY Reset Source: ctl_amod_g_rst_n |