SPRUJ83D December 2023 – January 2026 AM62P , AM62P-Q1
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| Instance Name | Physical Address |
|---|---|
| DDR32SS0 | 0F30 A18Ch |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED | PI_CMD_SWAP_EN | ||||||
| NONE | R/W | ||||||
| 0h | 0h | ||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | PI_LONG_COUNT_MASK | ||||||
| NONE | R/W | ||||||
| 0h | 0h | ||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED | PI_BSTLEN | ||||||
| NONE | R/W | ||||||
| 0h | 2h | ||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED | PI_BIST_FAIL_ADDR_1 | ||||||
| NONE | R | ||||||
| 0h | 0h | ||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:25 | RESERVED | NONE | 0h | Reserved |
| 24 | PI_CMD_SWAP_EN | R/W | 0h | Command pin swap function enable Reset Source: ctl_amod_g_rst_n |
| 23:21 | RESERVED | NONE | 0h | Reserved |
| 20:16 | PI_LONG_COUNT_MASK | R/W | 0h | Reduces the length of the long counter from 1024 cycles. Reset Source: ctl_amod_g_rst_n |
| 15:14 | RESERVED | NONE | 0h | Reserved |
| 13:8 | PI_BSTLEN | R/W | 2h | Encoded burst length sent to DRAMs during initialization. Reset Source: ctl_amod_g_rst_n |
| 7:3 | RESERVED | NONE | 0h | Reserved |
| 2:0 | PI_BIST_FAIL_ADDR_1 | R | 0h | The burst aligned address of BIST error. READ-ONLY Reset Source: ctl_amod_g_rst_n |