SPRUJ83D December 2023 – January 2026 AM62P , AM62P-Q1
| Instance | MAIN | MCU | WKUP |
|---|---|---|---|
| CBASS_CENTRAL2 | ✓ |
| Module Instance | Module Clock Input | Source Clock | Source Control Register | Description |
|---|---|---|---|---|
| CBASS_CENTRAL2 | HSM_CLK_1_CLK | MAIN_PLL15_HSDIV0_CLKOUT | None | |
| CBASS_CENTRAL2 | HSM_CLK_2_CLK | MAIN_PLL15_HSDIV0_CLKOUT/2 | None | |
| CBASS_CENTRAL2 | HSM_CLK_4_CLK | MAIN_PLL15_HSDIV0_CLKOUT/4 | None | |
| CBASS_CENTRAL2 | MCU_SYSCLK0_4_CLK | MCU_SYSCLK0/4 | None | |
| CBASS_CENTRAL2 | CLK | MAIN_PLL15_HSDIV0_CLKOUT | None |
| Module Instance | Module Interrupt Signal | Destination Interrupt Input | Destination | Description | Type |
|---|---|---|---|---|---|
| CBASS_CENTRAL2 | CBASS_CENTRAL2_default_err_intr_0 | GICSS0_spi_133 | GICSS0 | CBASS_CENTRAL2 interrupt request | level |
| CBASS_CENTRAL2 | CBASS_CENTRAL2_default_err_intr_0 | WKUP_R5FSS0_CORE0_intr_147 | WKUP_R5FSS0_CORE0 | CBASS_CENTRAL2 interrupt request | level |
| CBASS_CENTRAL2 | CBASS_CENTRAL2_default_err_intr_0 | MCU_R5FSS0_CORE0_cpu0_intr_147 | MCU_R5FSS0_CORE0 | CBASS_CENTRAL2 interrupt request | level |
| CBASS_CENTRAL2 | CBASS_CENTRAL2_default_exp_0 | ESM0_esm_lvl_event_80 | ESM0 | CBASS_CENTRAL2 interrupt request | level |