SPRUJ83D December 2023 – January 2026 AM62P , AM62P-Q1
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| Instance Name | Physical Address |
|---|---|
| CTRL_MMR0 | 0010 8330h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED | MCASP0_CLKSEL_AUXCLK_SEL | ||||||
| NONE | R/W | ||||||
| 0h | 0h | ||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:3 | RESERVED | NONE | 0h | Reserved |
| 2:0 | MCASP0_CLKSEL_AUXCLK_SEL | R/W | 0h | Selects the AUXCLK input source for McASP0 Field values (others are reserved): 3'b000 - MAIN_PLL2_HSDIV8_CLKOUT 3'b001 - MAIN_PLL1_HSDIV6_CLKOUT 3'b100 - ATCLK0 3'b101 - ATCLK1 3'b110 - ATCLK2 3'b111 - ATCLK3 Reset Source: mod_g_rst_n |