SPRUJ83D December 2023 – January 2026 AM62P , AM62P-Q1
| Instance | MAIN | MCU | WKUP |
|---|---|---|---|
| EQEP0 | ✓ | ||
| EQEP1 | ✓ | ||
| EQEP2 | ✓ |
| Module Instance | Power Sleep Controller | Power Domain | Module Domain | Index | Default | Controllable | Dependencies |
|---|---|---|---|---|---|---|---|
| EQEP0 | PSC0 | GP_CORE | LPSC_main_ip | 34 | ON | YES | LPSC_main_dm2main_infra_iso |
| EQEP1 | PSC0 | GP_CORE | LPSC_main_ip | 34 | ON | YES | LPSC_main_dm2main_infra_iso |
| EQEP2 | PSC0 | GP_CORE | LPSC_main_ip | 34 | ON | YES | LPSC_main_dm2main_infra_iso |
| Module Instance | Module Clock Input | Source Clock | Source Control Register | Description |
|---|---|---|---|---|
| EQEP0 | FICLK | MAIN_SYSCLK0/4 | functional and interface clock | |
| EQEP1 | FICLK | MAIN_SYSCLK0/4 | functional and interface clock | |
| EQEP2 | FICLK | MAIN_SYSCLK0/4 | functional and interface clock |
| Module Instance | Source | Description |
|---|---|---|
| EQEP0 | PSC0 | EQEP0 reset |
| EQEP1 | PSC0 | EQEP1 reset |
| EQEP2 | PSC0 | EQEP2 reset |
| Module Instance | Module Interrupt Signal | Destination Interrupt Input | Destination | Description | Type |
|---|---|---|---|---|---|
| EQEP0 | EQEP0_eqep_int_0 | GICSS0_spi_148 | GICSS0 | EQEP0 interrupt request | pulse |
| EQEP0 | EQEP0_eqep_int_0 | WKUP_R5FSS0_CORE0_intr_244 | WKUP_R5FSS0_CORE0 | EQEP0 interrupt request | pulse |
| EQEP0 | EQEP0_eqep_int_0 | MCU_R5FSS0_CORE0_cpu0_intr_86 | MCU_R5FSS0_CORE0 | EQEP0 interrupt request | pulse |
| EQEP1 | EQEP1_eqep_int_0 | GICSS0_spi_149 | GICSS0 | EQEP1 interrupt request | pulse |
| EQEP1 | EQEP1_eqep_int_0 | WKUP_R5FSS0_CORE0_intr_245 | WKUP_R5FSS0_CORE0 | EQEP1 interrupt request | pulse |
| EQEP1 | EQEP1_eqep_int_0 | MCU_R5FSS0_CORE0_cpu0_intr_87 | MCU_R5FSS0_CORE0 | EQEP1 interrupt request | pulse |
| EQEP2 | EQEP2_eqep_int_0 | GICSS0_spi_150 | GICSS0 | EQEP2 interrupt request | pulse |
| EQEP2 | EQEP2_eqep_int_0 | WKUP_R5FSS0_CORE0_intr_246 | WKUP_R5FSS0_CORE0 | EQEP2 interrupt request | pulse |
| EQEP2 | EQEP2_eqep_int_0 | MCU_R5FSS0_CORE0_cpu0_intr_88 | MCU_R5FSS0_CORE0 | EQEP2 interrupt request | pulse |