SPRUJ83D December 2023 – January 2026 AM62P , AM62P-Q1
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| Instance Name | Physical Address |
|---|---|
| WKUP_CTRL_MMR0 | 4301 8410h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| SLEEP_STATUS_EXITED_SLEEP | RESERVED | SLEEP_STATUS_MAIN_DS | RESERVED | ||||
| R/W1TC | NONE | R/W1TC | NONE | ||||
| 0h | 0h | 0h | 0h | ||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED | SLEEP_STATUS_MAIN_RESETSTATZ | ||||||
| NONE | R | ||||||
| 0h | X | ||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED | RSVD | ||||||
| NONE | |||||||
| 0h | X | ||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31 | SLEEP_STATUS_EXITED_SLEEP | R/W1TC | 0h | Captures disable/gating of HFOSC. Allows DM to confirm, after the WFI instruction, to determine whether or not HFOSC clocks were actually gated (a pending event may cancel the sleep sequence early). Field values (others are reserved): 1'b0 - OTHER 1'b1 - SLEEP_EXIT Reset Source: sys_por_rst_n |
| 30:29 | RESERVED | NONE | 0h | Reserved |
| 28 | SLEEP_STATUS_MAIN_DS | R/W1TC | 0h | Captures DS_MAIN por_pdoff assertion, so that after deepsleep exit software can differentiate between a regular power on reset and a main power on reset due to deepsleep exit. Write 1 to Clear this bit. Field values (others are reserved): 1'b0 - OTHER 1'b1 - DS_EXIT Reset Source: sys_por_rst_n |
| 27:9 | RESERVED | NONE | 0h | Reserved |
| 8 | SLEEP_STATUS_MAIN_RESETSTATZ | R | X | Reflects the status of the main domain reset (active low) Field values (others are reserved): 1'b0 - ASSERTED 1'b1 - DEASSERTED Reset Source: mod_g_rst_n |
| 7:1 | RESERVED | NONE | 0h | Reserved |