SPRUJ83D December 2023 – January 2026 AM62P , AM62P-Q1
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| Instance Name | Physical Address |
|---|---|
| DDR32SS0 | 0F30 86ACh |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED | PRE_2TICK_COUNT | ||||||
| NONE | R/W | ||||||
| 0h | 0h | ||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | BANK_ACTIVATE_2TICK_COUNT | ||||||
| NONE | R/W | ||||||
| 0h | 0h | ||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED | STRATEGY_2TICK_COUNT | ||||||
| NONE | R/W | ||||||
| 0h | 0h | ||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED | MULTI_CHANNEL_ZQ_CAL_MASTER | ||||||
| NONE | R/W | ||||||
| 0h | 0h | ||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:27 | RESERVED | NONE | 0h | Reserved |
| 26:24 | PRE_2TICK_COUNT | R/W | 0h | NEED TO FiLL IN . Reset Source: ctl_amod_g_rst_n |
| 23:19 | RESERVED | NONE | 0h | Reserved |
| 18:16 | BANK_ACTIVATE_2TICK_COUNT | R/W | 0h | NEED TO FiLL IN . Reset Source: ctl_amod_g_rst_n |
| 15:11 | RESERVED | NONE | 0h | Reserved |
| 10:8 | STRATEGY_2TICK_COUNT | R/W | 0h | NEED TO FiLL IN . Reset Source: ctl_amod_g_rst_n |
| 7:1 | RESERVED | NONE | 0h | Reserved |
| 0 | MULTI_CHANNEL_ZQ_CAL_MASTER | R/W | 0h | In a two controller scenario, defines if this controller will issue ZQ calibration start commands when neither controller is in a low power mode. Set to 1 to define this controller as the controller that issues ZQ calibration start commands or clear to 0 to define this controller as the target. This parameter should only be programmed once during initialization. Reset Source: ctl_amod_g_rst_n |