SPRUJ83D December 2023 – January 2026 AM62P , AM62P-Q1
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| Instance Name | Physical Address |
|---|---|
| DDR32SS0 | 0F30 A034h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED | PI_SWLVL_CS_SEL | ||||||
| NONE | R/W | ||||||
| 0h | 0h | ||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | PI_CS_MAP | ||||||
| NONE | R/W | ||||||
| 0h | Fh | ||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED | PI_RESERVED1 | ||||||
| NONE | R/W | ||||||
| 0h | 0h | ||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED | PI_SW_RST_N | ||||||
| NONE | R/W | ||||||
| 0h | 1h | ||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:25 | RESERVED | NONE | 0h | Reserved |
| 24 | PI_SWLVL_CS_SEL | R/W | 0h | Defines which chip selects are active in swlvl, 0 for binary, 1 for one-hot. Reset Source: ctl_amod_g_rst_n |
| 23:20 | RESERVED | NONE | 0h | Reserved |
| 19:16 | PI_CS_MAP | R/W | Fh | Defines which chip selects are active. Reset Source: ctl_amod_g_rst_n |
| 15:9 | RESERVED | NONE | 0h | Reserved |
| 8 | PI_RESERVED1 | R/W | 0h | Reserved |
| 7:1 | RESERVED | NONE | 0h | Reserved |
| 0 | PI_SW_RST_N | R/W | 1h | User request to reset the whole PI except the parameter modules. Set 0 to reset, set to 1 to release. Reset Source: ctl_amod_g_rst_n |