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AM62P

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AM62P

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CPU 2 Arm Cortex-A53, 4 Arm Cortex-A53 Frequency (MHz) 1400 Coprocessors 1 Arm Cortex-R5F Graphics acceleration 1 3D Display type 1 DSI, MIPI DPI, OLDI Protocols Ethernet, TSN Hardware accelerators CPU only, Video decode accelerator, Video encode accelerator Features General purpose Operating system Android, Linux Security Secure boot Rating Catalog Power supply solution TPS65224 Operating temperature range (°C) -40 to 125 Edge AI enabled Yes
CPU 2 Arm Cortex-A53, 4 Arm Cortex-A53 Frequency (MHz) 1400 Coprocessors 1 Arm Cortex-R5F Graphics acceleration 1 3D Display type 1 DSI, MIPI DPI, OLDI Protocols Ethernet, TSN Hardware accelerators CPU only, Video decode accelerator, Video encode accelerator Features General purpose Operating system Android, Linux Security Secure boot Rating Catalog Power supply solution TPS65224 Operating temperature range (°C) -40 to 125 Edge AI enabled Yes
FCBGA (AMH) 466 289 mm² (17 mm × 17 mm)

Processor Cores:

  • Up to Quad 64-bit Arm Cortex-A53 microprocessor subsystem at up to 1.4GHz
    • Quad-core Cortex-A53 cluster with 512KB L2 shared cache with SECDED ECC
    • Each A53 core has 32KB L1 DCache with SECDED ECC and 32KB L1 ICache with Parity protection
  • Single-core Arm Cortex-R5F at up to 800MHz, integrated as part of MCU Channel with FFI
    • 32KB ICache, 32KB L1 DCache, and 64KB TCM with SECDED ECC on all memories
    • 512KB SRAM with SECDED ECC
  • Single-core Arm Cortex-R5F at up to 800MHz, integrated to support Device Management
    • 32KB ICache, 32KB L1 DCache, and 64KB TCM with SECDED ECC on all memories

Multimedia:

  • Display subsystem
    • Triple display support over OLDI (LVDS) (1x OLDI-DL, 1x or 2x OLDI-SL), DSI or DPI
      • OLDI-SL (Single Link): up to 1920 x 1080 at 60fps (165MHZ Pixel Clock)
      • OLDI-DL (Dual Link): up to 3840 x 1080 at 60fps (150MHz Pixel Clock)
      • MIPI DSI: with 4 Lane MIPI® D-PHY supports up to 3840 x 1080 at 60fps (300MHz Pixel Clock)
      • DPI (24-bit RGB parallel interface): up to 1920 x 1080 at 60fps (165MHz pixel clock)
    • Four display pipelines with hardware overlay support. A maximum of two display pipelines may be used per display.
    • Supports safety features such as freeze frame detection and data correctness check
  • 3D Graphics Processing Unit
    • IMG BXS-4-64 with 256KB cache
    • Up to 50GFLOPS
    • Single shader core
    • OpenGL ES3.2 and Vulkan 1.2 API support
  • One Camera Serial Interface (CSI-2) Receiver with 4 Lane D-PHY
    • MIPI® CSI-2 v1.3 Compliant + MIPI D-PHY 1.2
    • Support for 1,2,3 or 4 data lane mode up to 2.5Gbps per lane
    • ECC verification/correction with CRC check + ECC on RAM
    • Virtual Channel support (up to 16)
    • Ability to write stream data directly to DDR via DMA
  • Video Encoder/Decoder
    • Support for HEVC (H.265) Main profiles at Level 5.1 High-tier
    • Support for H.264 BaseLine/Main/High Profiles at Level 5.2
    • Support for up to 4K UHD resolution (3840 × 2160)
      • Up to 400MPixels/s operation, with reduced clocking options available for lower power applications with lower performance needs

Memory Subsystem:

  • Up to 1.09MB of On-chip RAM
    • 64KB of On-Chip RAM (OCRAM) with SECDED ECC, can be divided into smaller banks in increments of 32KB for as many as 2 separate memory banks
    • 256KB of On-Chip RAM with SECDED ECC in SMS Subsystem
    • 176KB of On-Chip RAM with SECDED ECC in SMS Subsystem for TI security firmware
    • 512KB of On-chip RAM with SECDED ECC in Cortex-R5F MCU Subsystem
    • 64KB of On-chip RAM with SECDED ECC in Device Manager Subsystem
  • DDR Subsystem (DDRSS)
    • Supports LPDDR4 memory type
    • 32-bit data bus with inline ECC
    • Supports speeds up to 3733MT/s
    • Max size of 8GB

Functional Safety:

  • Functional Safety-Compliant targeted [Automotive]
    • Developed for functional safety applications
    • Documentation will be available to aid ISO 26262 functional safety system design
    • Systematic capability up to ASIL D targeted
    • Hardware integrity up to ASIL B targeted
    • Safety-related certification
      • ISO 26262 by TÜV SÜD planned
  • AEC - Q100 qualified [Automotive]

Security:

  • Secure boot supported
    • Hardware-enforced Root-of-Trust (RoT)
    • Support to switch RoT via backup key
    • Support for takeover protection, IP protection, and anti-roll back protection
  • Trusted Execution Environment (TEE) supported
    • Arm TrustZone based TEE
    • Extensive firewall support for isolation
    • Secure watchdog/timer/IPC
    • Secure storage support
    • Replay Protected Memory Block (RPMB) support
  • Dedicated Security Controller with user programmable HSM core and dedicated security DMA & IPC subsystem for isolated processing
  • Cryptographic acceleration supported
    • Session-aware cryptographic engine with ability to auto-switch key-material based on incoming data stream
      • Supports cryptographic cores
    • AES – 128-/192-/256-Bit key sizes
    • SHA2 – 224-/256-/384-/512-Bit key sizes
    • DRBG with true random number generator
    • PKA (Public Key Accelerator) to Assist in RSA/ECC processing for secure boot
  • Debugging security
    • Secure software controlled debug access
    • Security aware debugging

High-Speed Interfaces:

  • Integrated Ethernet switch supporting (total 2 external ports)
    • RMII(10/100) or RGMII (10/100/1000)
    • IEEE1588 (Annex D, Annex E, Annex F with 802.1AS PTP)
    • Clause 45 MDIO PHY management
    • Packet Classifier based on ALE engine with 512 classifiers
    • Priority based flow control
    • Time Sensitive Networking (TSN) support
    • Four CPU H/W interrupt Pacing
    • IP/UDP/TCP checksum offload in hardware
  • Two USB2.0 Ports
    • Port configurable as USB host, USB peripheral, or USB Dual-Role Device (DRD mode)
    • Integrated USB VBUS detection

General Connectivity:

  • 9x Universal Asynchronous Receiver-Transmitters (UART)
  • 5x Serial Peripheral Interface (SPI) controllers
  • 6x Inter-Integrated Circuit (I2C) ports
  • 3x Multichannel Audio Serial Ports (McASP)
    • Transmit and Receive Clocks up to 50MHz
    • Up to 4/6/16 Serial Data Pins across 3x McASP with Independent TX and RX Clocks
    • Supports Time Division Multiplexing (TDM), Inter-IC Sound (I2S), and Similar Formats
    • Supports Digital Audio Interface Transmission (SPDIF, IEC60958-1, and AES-3 Formats)
    • FIFO Buffers for Transmit and Receive (256 Bytes)
    • Support for audio reference output clock
  • 3x enhanced PWM modules (ePWM)
  • 3x enhanced Quadrature Encoder Pulse modules (eQEP)
  • 3x enhanced Capture modules (eCAP)
  • General-Purpose I/O (GPIO), All LVCMOS I/O can be configured as GPIO
  • 4x Controller Area Network (CAN) modules with CAN-FD support
    • Conforms w/ CAN Protocol 2.0 A, B and ISO 11898-1
    • Full CAN-FD support (up to 64 data bytes)
    • Parity/ECC check for Message RAM
    • Speed up to 8Mbps

Media and Data Storage:

  • 3x Multi-Media Card/Secure Digital (MMC/SD/SDIO) interfaces
    • 1x 8-bit eMMC interface up to:
      • HS200 for non-Q1 devices
      • HS400 for Q1 devices
    • 2x 4-bit SD/SDIO interfaces up to UHS-I
    • Compliant with eMMC 5.1, SD 3.0, and SDIO Version 3.0
  • 1× General-Purpose Memory Controller (GPMC) up to 133MHz
    • Flexible 8- and 16-bit Asynchronous Memory Interface with up to four Chip (22-bit address) Selects (NAND, NOR, Muxed-NOR, and SRAM)
    • Uses BCH code to support 4-, 8-, or 16-bit ECC
    • Uses Hamming code to support 1-bit ECC
    • Error Locator Module (ELM)
      • Used with the GPMC to locate addresses of data errors from syndrome polynomials generated using a BCH algorithm
      • Supports 4-, 8-, and 16-bit per 512-Byte block error location based on BCH algorithms
  • OSPI/QSPI with DDR / SDR support
    • Support for Serial NAND and Serial NOR Flash devices
    • 4GBytes memory address support
    • XIP mode with optional on-the-fly encryption

Power Management:

  • Low-power modes supported by Device Manager:
    • Partial IO support for CAN/GPIO/UART wakeup
    • I/O Only + DDR in Self Refresh for Suspend to RAM
    • DeepSleep
    • MCU Only
    • Standby
    • Dynamic frequency scaling

Optimal Power Management Solution:

  • Recommended TI Power Management ICs (PMIC)
    • Supports up to Automotive ASIL-B functional safety when powering the AEC – Q100 qualified AM62P-Q1 device
    • Companion PMIC is specially designed to meet power supply requirements
    • Flexible mapping and factory programmed configurations to support different use cases

Boot Options:

  • UART
  • I2C EEPROM
  • OSPI/QSPI Flash
  • GPMC NOR/NAND Flash
  • SD Card
  • eMMC
  • USB (host) Mass storage
  • USB (device) boot from external host (DFU mode)
  • Ethernet

Technology / Package:

  • 16nm FinFET technology
  • 17mm x 17mm, 0.65/0.8mm pitch with VCA, 466-pin FCBGA

Processor Cores:

  • Up to Quad 64-bit Arm Cortex-A53 microprocessor subsystem at up to 1.4GHz
    • Quad-core Cortex-A53 cluster with 512KB L2 shared cache with SECDED ECC
    • Each A53 core has 32KB L1 DCache with SECDED ECC and 32KB L1 ICache with Parity protection
  • Single-core Arm Cortex-R5F at up to 800MHz, integrated as part of MCU Channel with FFI
    • 32KB ICache, 32KB L1 DCache, and 64KB TCM with SECDED ECC on all memories
    • 512KB SRAM with SECDED ECC
  • Single-core Arm Cortex-R5F at up to 800MHz, integrated to support Device Management
    • 32KB ICache, 32KB L1 DCache, and 64KB TCM with SECDED ECC on all memories

Multimedia:

  • Display subsystem
    • Triple display support over OLDI (LVDS) (1x OLDI-DL, 1x or 2x OLDI-SL), DSI or DPI
      • OLDI-SL (Single Link): up to 1920 x 1080 at 60fps (165MHZ Pixel Clock)
      • OLDI-DL (Dual Link): up to 3840 x 1080 at 60fps (150MHz Pixel Clock)
      • MIPI DSI: with 4 Lane MIPI® D-PHY supports up to 3840 x 1080 at 60fps (300MHz Pixel Clock)
      • DPI (24-bit RGB parallel interface): up to 1920 x 1080 at 60fps (165MHz pixel clock)
    • Four display pipelines with hardware overlay support. A maximum of two display pipelines may be used per display.
    • Supports safety features such as freeze frame detection and data correctness check
  • 3D Graphics Processing Unit
    • IMG BXS-4-64 with 256KB cache
    • Up to 50GFLOPS
    • Single shader core
    • OpenGL ES3.2 and Vulkan 1.2 API support
  • One Camera Serial Interface (CSI-2) Receiver with 4 Lane D-PHY
    • MIPI® CSI-2 v1.3 Compliant + MIPI D-PHY 1.2
    • Support for 1,2,3 or 4 data lane mode up to 2.5Gbps per lane
    • ECC verification/correction with CRC check + ECC on RAM
    • Virtual Channel support (up to 16)
    • Ability to write stream data directly to DDR via DMA
  • Video Encoder/Decoder
    • Support for HEVC (H.265) Main profiles at Level 5.1 High-tier
    • Support for H.264 BaseLine/Main/High Profiles at Level 5.2
    • Support for up to 4K UHD resolution (3840 × 2160)
      • Up to 400MPixels/s operation, with reduced clocking options available for lower power applications with lower performance needs

Memory Subsystem:

  • Up to 1.09MB of On-chip RAM
    • 64KB of On-Chip RAM (OCRAM) with SECDED ECC, can be divided into smaller banks in increments of 32KB for as many as 2 separate memory banks
    • 256KB of On-Chip RAM with SECDED ECC in SMS Subsystem
    • 176KB of On-Chip RAM with SECDED ECC in SMS Subsystem for TI security firmware
    • 512KB of On-chip RAM with SECDED ECC in Cortex-R5F MCU Subsystem
    • 64KB of On-chip RAM with SECDED ECC in Device Manager Subsystem
  • DDR Subsystem (DDRSS)
    • Supports LPDDR4 memory type
    • 32-bit data bus with inline ECC
    • Supports speeds up to 3733MT/s
    • Max size of 8GB

Functional Safety:

  • Functional Safety-Compliant targeted [Automotive]
    • Developed for functional safety applications
    • Documentation will be available to aid ISO 26262 functional safety system design
    • Systematic capability up to ASIL D targeted
    • Hardware integrity up to ASIL B targeted
    • Safety-related certification
      • ISO 26262 by TÜV SÜD planned
  • AEC - Q100 qualified [Automotive]

Security:

  • Secure boot supported
    • Hardware-enforced Root-of-Trust (RoT)
    • Support to switch RoT via backup key
    • Support for takeover protection, IP protection, and anti-roll back protection
  • Trusted Execution Environment (TEE) supported
    • Arm TrustZone based TEE
    • Extensive firewall support for isolation
    • Secure watchdog/timer/IPC
    • Secure storage support
    • Replay Protected Memory Block (RPMB) support
  • Dedicated Security Controller with user programmable HSM core and dedicated security DMA & IPC subsystem for isolated processing
  • Cryptographic acceleration supported
    • Session-aware cryptographic engine with ability to auto-switch key-material based on incoming data stream
      • Supports cryptographic cores
    • AES – 128-/192-/256-Bit key sizes
    • SHA2 – 224-/256-/384-/512-Bit key sizes
    • DRBG with true random number generator
    • PKA (Public Key Accelerator) to Assist in RSA/ECC processing for secure boot
  • Debugging security
    • Secure software controlled debug access
    • Security aware debugging

High-Speed Interfaces:

  • Integrated Ethernet switch supporting (total 2 external ports)
    • RMII(10/100) or RGMII (10/100/1000)
    • IEEE1588 (Annex D, Annex E, Annex F with 802.1AS PTP)
    • Clause 45 MDIO PHY management
    • Packet Classifier based on ALE engine with 512 classifiers
    • Priority based flow control
    • Time Sensitive Networking (TSN) support
    • Four CPU H/W interrupt Pacing
    • IP/UDP/TCP checksum offload in hardware
  • Two USB2.0 Ports
    • Port configurable as USB host, USB peripheral, or USB Dual-Role Device (DRD mode)
    • Integrated USB VBUS detection

General Connectivity:

  • 9x Universal Asynchronous Receiver-Transmitters (UART)
  • 5x Serial Peripheral Interface (SPI) controllers
  • 6x Inter-Integrated Circuit (I2C) ports
  • 3x Multichannel Audio Serial Ports (McASP)
    • Transmit and Receive Clocks up to 50MHz
    • Up to 4/6/16 Serial Data Pins across 3x McASP with Independent TX and RX Clocks
    • Supports Time Division Multiplexing (TDM), Inter-IC Sound (I2S), and Similar Formats
    • Supports Digital Audio Interface Transmission (SPDIF, IEC60958-1, and AES-3 Formats)
    • FIFO Buffers for Transmit and Receive (256 Bytes)
    • Support for audio reference output clock
  • 3x enhanced PWM modules (ePWM)
  • 3x enhanced Quadrature Encoder Pulse modules (eQEP)
  • 3x enhanced Capture modules (eCAP)
  • General-Purpose I/O (GPIO), All LVCMOS I/O can be configured as GPIO
  • 4x Controller Area Network (CAN) modules with CAN-FD support
    • Conforms w/ CAN Protocol 2.0 A, B and ISO 11898-1
    • Full CAN-FD support (up to 64 data bytes)
    • Parity/ECC check for Message RAM
    • Speed up to 8Mbps

Media and Data Storage:

  • 3x Multi-Media Card/Secure Digital (MMC/SD/SDIO) interfaces
    • 1x 8-bit eMMC interface up to:
      • HS200 for non-Q1 devices
      • HS400 for Q1 devices
    • 2x 4-bit SD/SDIO interfaces up to UHS-I
    • Compliant with eMMC 5.1, SD 3.0, and SDIO Version 3.0
  • 1× General-Purpose Memory Controller (GPMC) up to 133MHz
    • Flexible 8- and 16-bit Asynchronous Memory Interface with up to four Chip (22-bit address) Selects (NAND, NOR, Muxed-NOR, and SRAM)
    • Uses BCH code to support 4-, 8-, or 16-bit ECC
    • Uses Hamming code to support 1-bit ECC
    • Error Locator Module (ELM)
      • Used with the GPMC to locate addresses of data errors from syndrome polynomials generated using a BCH algorithm
      • Supports 4-, 8-, and 16-bit per 512-Byte block error location based on BCH algorithms
  • OSPI/QSPI with DDR / SDR support
    • Support for Serial NAND and Serial NOR Flash devices
    • 4GBytes memory address support
    • XIP mode with optional on-the-fly encryption

Power Management:

  • Low-power modes supported by Device Manager:
    • Partial IO support for CAN/GPIO/UART wakeup
    • I/O Only + DDR in Self Refresh for Suspend to RAM
    • DeepSleep
    • MCU Only
    • Standby
    • Dynamic frequency scaling

Optimal Power Management Solution:

  • Recommended TI Power Management ICs (PMIC)
    • Supports up to Automotive ASIL-B functional safety when powering the AEC – Q100 qualified AM62P-Q1 device
    • Companion PMIC is specially designed to meet power supply requirements
    • Flexible mapping and factory programmed configurations to support different use cases

Boot Options:

  • UART
  • I2C EEPROM
  • OSPI/QSPI Flash
  • GPMC NOR/NAND Flash
  • SD Card
  • eMMC
  • USB (host) Mass storage
  • USB (device) boot from external host (DFU mode)
  • Ethernet

Technology / Package:

  • 16nm FinFET technology
  • 17mm x 17mm, 0.65/0.8mm pitch with VCA, 466-pin FCBGA

The AM62Px (P = Plus) is an extension of the existing Sitara™ AM62x low-cost family of application processors built for high-performance embedded 3D display applications. Scalable Arm® Cortex®-A53 performance and embedded features, such as: multi-screen high-definition display support, 3D-graphics acceleration, 4K video acceleration, and extensive peripherals make the AM62Px well-suited for a broad range of automotive and industrial applications, including automotive digital instrumentation, automotive displays, industrial HMI, and more.

Key features and benefits:

  • Focus on innovation and fast development with Linux and Android™ SDKs accompanied with real-time functional safety and security SDKs.
  • Address next wave of HMI designs with new generation of 3D GPU and 4K video acceleration.
  • Enhance your design connectivity with an extensive set of automotive and high-speed IOs, including: 4x CAN-FD, 3-port Gigabit Ethernet switch (two external ports) with TSN support, and two USB2.0 ports.
  • Supports the latest cybersecurity requirements with the built-in Hardware Security Module (HSM).
  • Provides intelligent features, such as: facial recognition and touchless HMI with Arm® Cortex®-A53 CPUs and open-source AI software and tools

The AM62Px processors comply with the AEC - Q100 automotive standard. ASIL-B functional safety requirements can be addressed using an integrated Arm Cortex-R5F core and dedicated peripherals, which can all be isolated from the rest of the processor.

Products in the AM62Px processor family:

AM62P-Q1 – Automotive digital instrumentation SoC with scalable Arm Cortex-A53 performance, multi high-definition display support, 3D GPU and 4K video acceleration.

Featured design resources:

  • Hardware Evaluation Module (EVM) - SK-AM62P-LP
  • Software Development Kit (SDK) - PROCESSOR-SDK-AM62P
  • Linux Academy

The AM62Px (P = Plus) is an extension of the existing Sitara™ AM62x low-cost family of application processors built for high-performance embedded 3D display applications. Scalable Arm® Cortex®-A53 performance and embedded features, such as: multi-screen high-definition display support, 3D-graphics acceleration, 4K video acceleration, and extensive peripherals make the AM62Px well-suited for a broad range of automotive and industrial applications, including automotive digital instrumentation, automotive displays, industrial HMI, and more.

Key features and benefits:

  • Focus on innovation and fast development with Linux and Android™ SDKs accompanied with real-time functional safety and security SDKs.
  • Address next wave of HMI designs with new generation of 3D GPU and 4K video acceleration.
  • Enhance your design connectivity with an extensive set of automotive and high-speed IOs, including: 4x CAN-FD, 3-port Gigabit Ethernet switch (two external ports) with TSN support, and two USB2.0 ports.
  • Supports the latest cybersecurity requirements with the built-in Hardware Security Module (HSM).
  • Provides intelligent features, such as: facial recognition and touchless HMI with Arm® Cortex®-A53 CPUs and open-source AI software and tools

The AM62Px processors comply with the AEC - Q100 automotive standard. ASIL-B functional safety requirements can be addressed using an integrated Arm Cortex-R5F core and dedicated peripherals, which can all be isolated from the rest of the processor.

Products in the AM62Px processor family:

AM62P-Q1 – Automotive digital instrumentation SoC with scalable Arm Cortex-A53 performance, multi high-definition display support, 3D GPU and 4K video acceleration.

Featured design resources:

  • Hardware Evaluation Module (EVM) - SK-AM62P-LP
  • Software Development Kit (SDK) - PROCESSOR-SDK-AM62P
  • Linux Academy
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顶层文档 类型 标题 格式选项 下载最新的英语版本 日期
* 数据表 AM62Px Sitara™ Processors 数据表 (Rev. F) PDF | HTML 2026-11-2
* 用户指南 AM62Px Sitara™ Processors Technical Reference Manual (Rev. E) PDF | HTML 2026-10-1
* 勘误表 AM62Px Sitara™ Processors Silicon Errata (Rev. B) PDF | HTML 2025-10-31
白皮书 Choosing the Right Processor and Graphical User Interface (GUI) PDF | HTML 2026-11-3
应用手册 Integrating CDD DMA in AUTOSAR Environment PDF | HTML 2026-10-23
白皮书 嵌入式处理器供应链中的 CRA 角色 PDF | HTML PDF | HTML 2026-10-12
用户指南 AM62x、AM62Ax、AM62D-Q1 和 AM62Px 处理器系列、支 持的外设和原理图设计指南 PDF | HTML PDF | HTML 2026-10-12
应用手册 Sitara 器件上串行 NAND 闪存的坏块管理 PDF | HTML PDF | HTML 2026-9-30
应用手册 Linux Board Porting on AM62x Devices (Rev. B) PDF | HTML 2026-9-29
应用手册 AM62Px eMMC HS400 电路板设计和仿真指南 PDF | HTML PDF | HTML 2026-9-8
应用手册 Jacinto™ 7 和 Sitara™ 处理器 DDR 内联 ECC 错误注入与验 证指南 PDF | HTML PDF | HTML 2026-9-3
应用手册 AM62Px 最大电流额定值 PDF | HTML PDF | HTML 2026-7-10
应用手册 MCU+ SDK 上 OSPI 和 QSPI 串行 NOR/NAND 闪存操作的吞 吐量特性 PDF | HTML PDF | HTML 2026-6-25
应用手册 在 TI Sitara 器件上启用 PipeWire PDF | HTML PDF | HTML 2026-6-18
应用手册 TDA4x 及 AM6x 的热管理 PDF | HTML PDF | HTML 2026-5-14
白皮书 守护未来安全：通过 TI 的 Jacinto 和 Sitara 处理器 实现《网络弹性法案》(EU-CRA) 合规 PDF | HTML PDF | HTML 2026-4-30
应用手册 在 TI 嵌入式平台上使用 Qt 6 构建现代 GUI PDF | HTML PDF | HTML 2026-4-7
应用手册 适用于 MCU+ SDK 上 SitaraTM 处理器的增强型 OSPI PHY 调 优算法 PDF | HTML PDF | HTML 2026-3-31
应用手册 处理器高速并行接口的定制电路板设计与仿真指南 (Rev. A) PDF | HTML 英语版 (Rev.A) PDF | HTML 2026-2-17
应用手册 TDA4VEN和AM62P 三屏独立显示方案 2025-12-22
应用手册 Sitara SoC 上的 Linux 音频 PDF | HTML 英语版 PDF | HTML 2025-12-19
应用手册 不使用启动模式开关将 Sitara MPU HS-FS 器件转换成 HS-SE 器件 PDF | HTML 英语版 PDF | HTML 2025-12-16
应用手册 利用集成 SysConfig 的 MCU+SDK 加速开发进程 PDF | HTML 英语版 PDF | HTML 2025-12-4
应用手册 MCU+SDK 的 xSPI 定制闪存调试指南 PDF | HTML 英语版 PDF | HTML 2025-12-4
应用手册 在 Sitara MPU 上启用 Matter (Rev. A) PDF | HTML 英语版 (Rev.A) PDF | HTML 2025-12-1
用户指南 使用 AM62P、AM62P-Q1 处理器系列的定制电路板设计的硬 件设计注意事项 (Rev. C) PDF | HTML 英语版 (Rev.C) PDF | HTML 2025-11-17
应用手册 Sitara™ 处理器配电网络：实施与分析 (Rev. H) PDF | HTML 英语版 (Rev.H) PDF | HTML 2025-11-12
用户指南 AM62P、AM62P-Q1 处理器系列原理图设计指南和审查检查清 单 (Rev. B) PDF | HTML 英语版 (Rev.B) PDF | HTML 2025-11-6
应用手册 AM62x、AM62Ax、AM62Px、AM62Lx 展频时钟 PDF | HTML 英语版 PDF | HTML 2025-11-3
应用手册 AM62P DSS 概览 PDF | HTML 英语版 PDF | HTML 2025-10-10
应用手册 AM6x 和 TDA4VEN 上的 OSPI NOR 闪存调试支持 PDF | HTML 英语版 2025-10-10
应用手册 TDA4x和AM6x的动态温度检测与热管理 PDF | HTML PDF | HTML 2025-8-12
功能安全信息 AM6x, AM24x Software Diagnostics Library TÜV SÜD Functional Safety Certificate for 9.2.0 SDK (Rev. A) 2025-7-17
白皮书 保护基于 Arm 的应用处理器 (Rev. F) PDF | HTML 英语版 (Rev.F) PDF | HTML 2025-4-3
应用手册 无闪烁切换的早期启动屏幕 PDF | HTML 英语版 PDF | HTML 2025-3-21
应用手册 显示接口：Sitara MPU 可视化设计综合指南 (Rev. A) PDF | HTML 英语版 (Rev.A) PDF | HTML 2025-3-11
应用手册 Jacinto™ 和 Sitara™ 嵌入式处理器上的微控制器抽象层 PDF | HTML 英语版 PDF | HTML 2025-3-6
应用手册 MCAN Debug Guide PDF | HTML 2025-2-18
应用手册 AM62Ax、AM62Px、AM62Dx LPDDR4 电路板设计和布局布 线指南 (Rev. B) PDF | HTML 英语版 (Rev.B) PDF | HTML 2025-1-13
产品概述 AM62P - Arm® Cortex®- A53 微处理器 PDF | HTML 英语版 PDF | HTML 2024-12-16
应用手册 在 AM6x 上开发多摄像头应用 (Rev. A) PDF | HTML 英语版 (Rev.A) PDF | HTML 2024-12-3
应用手册 基于 Linux® 的基本以太网接口调试 PDF | HTML 英语版 PDF | HTML 2024-10-14
用户指南 AM62P 功耗估算工具 PDF | HTML 英语版 PDF | HTML 2024-9-25
应用手册 Sitara™AM62P 基准测试 (Rev. A) PDF | HTML 英语版 (Rev.A) PDF | HTML 2024-8-22
应用手册 在 AM62P 上集成 LVDS 面板 PDF | HTML 英语版 PDF | HTML 2024-8-6
应用手册 调试 TDA4x 和 AM6x 器件上的 GPU 驱动程序问题 PDF | HTML 英语版 PDF | HTML 2024-6-21
应用简报 智能多显示系统的五大设计注意事项 PDF | HTML 英语版 PDF | HTML 2024-4-9
产品概述 为 AM62Px 器件供电的 PMIC PDF | HTML 英语版 PDF | HTML 2024-3-18
应用手册 AM62Px PCB 设计迂回布线 (Rev. B) PDF | HTML 英语版 (Rev.B) PDF | HTML 2024-1-17
应用手册 高速接口布局指南 (Rev. J) PDF | HTML 英语版 (Rev.J) PDF | HTML 2023-3-23

设计与开发

电源解决方案

查找适用于 AM62P 的电源解决方案。TI 提供适用于 TI 和非 TI 片上系统 (SoC)、处理器、微控制器、传感器和现场可编程门阵列 (FPGA) 的电源解决方案。

查看解决方案
评估板

SK-AM62P-LP — AM62P 入门套件评估模块

SK-AM62P-LP 入门套件 (SK) 评估模块 (EVM) 围绕我们的 AM62P 显示处理器而构建，该处理器包含可扩展的 Arm® Cortex®-A53 性能和嵌入式功能，如三路高清显示支持、高性能 3D-GPU、4K 视频加速和大量外设。SK-AM62P-LP 适合那些希望开发汽车和工业应用（包括汽车数字仪表、汽车显示屏、工业 HMI 等）的人员。

SK-AM62P-LP 包含可支持多达 3 个屏幕的多个显示连接器、一个移动产业处理器接口 (MIPI®) CSI-2 摄像头连接器、一个用于 WiFi 或蓝牙模块的 M.2 连接器、2 个千兆位以太网端口、用于调试输出的 UART 到 (...)

用户指南: PDF | HTML
支持的产品和硬件
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评估板

SK-LCD3 — SK-LCD3 评估模块

SK-LCD3 800x1280 DSI LCD 显示配件套件是用于 AM62P、AM62L 处理器（如 SK-AM62P-LP、TMDS62LEVM 等）启动套件 EVM 的附加配件，可为 HMI、工业 PC 及其他需要显示功能的应用场景添加触摸和显示功能。TFT LCD 屏幕为 7.0" 显示屏，具有 WUXGA 分辨率 (800x1280) 并支持电容式触控。
用户指南: PDF | HTML
支持的产品和硬件
有库存
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评估板

CRLNK-3P-MITYSOM-AM62P — 适用于 AM62P 处理器的 Critical Link 模块上系统 (SOM)

MitySOM-AM62P 系列模块上系统具有德州仪器 (TI) Sitara AM62Px 处理器。该模块包括 eMMC 闪存（选配）、八核或四核 SPI NOR 闪存（选配）和 LPDDR4 RAM 存储器子系统。MitySOM-AM62P 是一款适合生产环境的解决方案，专为实现长期可用性和性能而设计。
来源：Critical Link LLC
支持的产品和硬件
评估板

TRDX-3P-VERDIN-AM62P — Toradex Verdin-AM62Px 模块上系统 (SOM)

Verdin AM62P 是现有 Verdin AM62 模块上系统 (SoM) 的扩展，专为高性能嵌入式 3D 显示应用而设计，可提供高达 50 GFLOPS 的图形性能。Verdin AM62P 具有可扩展的 Arm Cortex-A53 内核、多屏幕高清显示支持、3D 图形加速、4K 视频加速以及丰富的外设，非常适合各种工业应用。


SoM 提供了丰富的接口选择，包括 GPIO、I2C、SPI、USB、CAN FD、UART 以及 MIPI DSI 显示接口和 CSI 摄像头接口。它还配备一个支持 IEEE1588 的千兆位以太网 PHY，以及具有 RGMII 接口的另一个以太网 (...)

来源：Toradex
支持的产品和硬件
代码示例或演示

KDAB-3P-QT-DEMOS — KDAB 集团为 AM6 处理器编写的基于 Qt 的 人机界面 (HMI) 演示软件示例

德州仪器 (TI) AM62 和 AM62P 的 KDAB 多屏演示展示了 TI AM623、AM625 和 AM62P 处理器的可扩展图形和显示功能。该演示采用 Qt 构建，突出了多显示器渲染、流畅的 UI 性能和硬件加速图形功能，演示了 TI 嵌入式处理器在各种应用中的灵活性。AM62 系列的可扩展性能支持从成本敏感型工业 HMI 到高性能边缘器件的高效部署，确保提供无缝的用户体验。该演示生动地展示了 TI 的 AM62 和 AM62P 器件如何优化图形工作负载，使其成为需要多屏和交互式接口的嵌入式系统的理想选择。

来源：KDAB Group
支持的产品和硬件
调试探针

TMDSEMU110-U — XDS110 JTAG 调试探针

德州仪器 (TI) 的 XDS110 是一款适用于 TI 嵌入式处理器的新型调试探针（仿真器）。XDS110 取代了 XDS100 系列，同时在单个仓体中支持更广泛的标准（IEEE1149.1、IEEE1149.7、SWD）。此外，对于带有嵌入式缓冲跟踪器 (ETB) 的所有 Arm® 和 DSP 处理器，所有 XDS 调试探针均支持核心和系统跟踪。  对于引脚上的内核跟踪，则需要使用 XDS560v2 PRO TRACE。

德州仪器 (TI) 的 XDS110 通过 TI 20 引脚连接器（带有适合 TI 14 引脚、Arm 10 引脚和 Arm 20 引脚的多个适配器）连接到目标板，通过 (...)

支持的产品和硬件
有库存
限制：
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调试探针

TMDSEMU200-U — XDS200 USB 调试探针

XDS200 是用于调试 TI 嵌入式器件的调试探针（仿真器）。对于大多数器件，建议使用较新、成本较低的 XDS110 (www.ti.com/tool/TMDSEMU110-U)。XDS200 在单个仓体中支持更广泛的标准（IEEE1149.1、IEEE1149.7、SWD）。所有 XDS 调试探针在所有具有嵌入式跟踪缓冲器 (ETB) 的 Arm® 和 DSP 处理器中均支持内核和系统跟踪。

XDS200 通过 TI 20 引脚连接器（带有适用于 TI 14 引脚、Arm Cortex® 10 引脚和 Arm 20 引脚的多个适配器）连接到目标板，并通过 USB2.0 高速 (...)

支持的产品和硬件
有库存
限制：
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调试探针

TMDSEMU560V2STM-U — XDS560™ 软件 v2 系统跟踪 USB 调试探针

XDS560v2 是 XDS560™ 系列调试探针中性能最高的一款，同时支持传统 JTAG 标准 (IEEE1149.1) 和 cJTAG (IEEE1149.7)。  请注意，它不支持串行线调试 (SWD)。

对于带有嵌入式缓冲跟踪器 (ETB) 的所有 ARM 和 DSP 处理器，所有 XDS 调试探针均支持核心和系统跟踪。  对于引脚上的跟踪，则需要使用 XDS560v2 PRO TRACE。

XDS560v2 通过 MIPI HSPT 60 引脚连接器（带有多个用于 TI 14 引脚、TI 20 引脚和 ARM 20 引脚的适配器）连接到目标板，并通过 USB2.0 高速 (...)

支持的产品和硬件
有库存
限制：
??asset.out-of-stock-ti_zh_CN??
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调试探针

TMDSEMU560V2STM-UE — Spectrum Digital XDS560v2 系统跟踪 USB 和以太网

XDS560v2 System Trace 是 XDS560v2 系列高性能 TI 处理器调试探针（仿真器）的第一种型号。XDS560v2 是 XDS 系列调试探针中性能最高的一款，同时支持传统 JTAG 标准 (IEEE1149.1) 和 cJTAG (IEEE1149.7)。

XDS560v2 System Trace 在其巨大的外部存储器缓冲区中加入了系统引脚跟踪。这种外部存储器缓冲区适用于指定的 TI 器件，通过捕获相关器件级信息，获得准确的总线性能活动和吞吐量，并对内核和外设进行电源管理。此外，对于带有嵌入式缓冲跟踪器 (ETB) 的所有 ARM 和 DSP 处理器，所有 XDS (...)

支持的产品和硬件
有库存
限制：
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调试探针

LB-3P-TRACE32-ARM — 适用于基于 Arm® 的微控制器和处理器的 Lauterbach TRACE32® 调试和跟踪系统

Lauterbach TRACE32® 工具是一套先进的硬件和软件组件，开发人员可通过它分析、优化和认证各种基于 Arm® 的微控制器和处理器。这套全球知名的嵌入式系统和 SoC 调试和跟踪解决方案是所有开发阶段（从器件前开发一直到产品认证和现场故障排查）的理想解决方案。Lauterbach 工具直观的模块化设计可为工程师提供当今最高的可用性能，并提供可随需求变化而调整和扩展的系统。借助 TRACE32® 调试器，开发人员还可以通过单个调试接口同时调试和控制 SoC 中的任何 C28x/C29x C6x/C7x DSP 内核以及所有其他 Arm 内核，这是业界的一项独特功能。

来源：Lauterbach GmbH
支持的产品和硬件
调试探针

TSK-3P-BLUEBOX — TASKING BlueBox hardware debugger

TASKING’s Debug, Trace, and Test tools offer comprehensive solutions for efficient debugging, tracing, and testing of TI's embedded systems. The scalable TASKING BlueBox debuggers allow users to easily flash, debug, and test across TI's portfolio. Development on TI hardware is made even easier with (...)

来源：TASKING Germany GmbH
支持的产品和硬件
软件开发套件 (SDK)

MCU-PLUS-SDK-AM62P — MCU+ SDK for AM62P – RTOS, No-RTOS

AM62P 处理器 Linux®、Android™ 和 TI MCU+ 软件开发套件 (SDK) 均为面向嵌入式处理器的统一软件平台，设置简单，可提供开箱即用的基准测试和演示。

这个 SDK 的所有版本在其适用的各个产品系列中都保持一致性，开发人员可以在各种产品中连续重复使用和开发软件。

支持的产品和硬件
软件开发套件 (SDK)

PROCESSOR-SDK-ANDROID-AM62P — Processor SDK Android for AM62P

AM62P 处理器 Linux®、Android™ 和 TI MCU+ 软件开发套件 (SDK) 均为面向嵌入式处理器的统一软件平台，设置简单，可提供开箱即用的基准测试和演示。

这个 SDK 的所有版本在其适用的各个产品系列中都保持一致性，开发人员可以在各种产品中连续重复使用和开发软件。

支持的产品和硬件
软件开发套件 (SDK)

PROCESSOR-SDK-LINUX-AM62P — Processor SDK Linux for AM62P

AM62P 处理器 Linux®、Android™ 和 TI MCU+ 软件开发套件 (SDK) 均为面向嵌入式处理器的统一软件平台，设置简单，可提供开箱即用的基准测试和演示。

这个 SDK 的所有版本在其适用的各个产品系列中都保持一致性，开发人员可以在各种产品中连续重复使用和开发软件。

支持的产品和硬件
软件开发套件 (SDK)

PROCESSOR-SDK-LINUX-RT-AM62P — Processor SDK Linux RT for AM62P

AM62P 处理器 Linux®、Android™ 和 TI MCU+ 软件开发套件 (SDK) 均为面向嵌入式处理器的统一软件平台，设置简单，可提供开箱即用的基准测试和演示。

这个 SDK 的所有版本在其适用的各个产品系列中都保持一致性，开发人员可以在各种产品中连续重复使用和开发软件。

支持的产品和硬件
IDE、配置、编译器或调试器

CCSTUDIO — Code Composer Studio™ integrated development environment (IDE)

CCStudio™ 集成开发环境 (IDE) 是 TI 庞大的 CCStudio™ 开发生态系统的一部分，是面向 TI 微控制器、处理器、无线连接器件和雷达传感器的集成开发环境。CCStudio IDE 可作为桌面或基于云的应用提供。云版本无需下载大型软件。此外，由于该工具基于 Eclipse Theia 框架构建，因此该界面对 VS Code®用户来说非常熟悉。如果选择在本机使用 VS Code，可以从市场上获取适用于所选器件的 TI VS Code 扩展包。

AI 驱动的开发
CCStudio IDE 集成了行业标准 AI (...)

支持的产品和硬件
IDE、配置、编译器或调试器

DDR-CONFIG-AM62P — DDR Configuration Tool

This SysConfig based tool simplifies the process of configuring the DDR Subsystem Controller and PHY to interface to SDRAM devices. Based on the memory device, board design, and topology the tool outputs files to initialize and train the selected memory.
支持的产品和硬件
IDE、配置、编译器或调试器

K3-RESOURCE-CONFIGURATION — Resource partitioning tool for multi core SOCs

Also known as the k3-respart-tool, the Resource Configuration tool allows for configuration of various system level parameters and generate the necessary data to be fed into software components
支持的产品和硬件
IDE、配置、编译器或调试器

PRU-CQKIT — PRU Safety Compiler Qualification Kit

为帮助客户验证 TI ARM®、C28/CLA、C29、C6000™ 或 C7000™ C/C++ 编译器的使用符合功能和安全标准，我们开发了 TI 编译器资质审核套件。 

提供两种资质审核套件类型：

  • 安全编译器资质审核套件 (CQKIT) 可用于根据 IEC 61508、ISO 26262 和 EN 50657 进行功能安全开发。
  • 安全和安保编译器资质审核套件 (CSQKIT) 可用于功能安全开发（EN 50657 更新到 EN 50716）和网络安全开发（根据 ISO 21434 标准）。 

注意：每个编译器版本都只有较旧的 CQKIT 或 CSQKIT 

 

这两种 QKIT 类型均为 (...)

支持的产品和硬件
IDE、配置、编译器或调试器

SYSCONFIG — Standalone desktop version of SysConfig

CCStudio™ SysConfig is part of TI's extensive CCStudio™ development ecosystem and is a configuration tool that simplifies hardware and software configuration challenges to accelerate software development.

SysConfig provides an intuitive graphical user interface for configuring pins, peripherals, (...)

支持的产品和硬件
IDE、配置、编译器或调试器

TSK-3P-VX-TOOLSET — 用于 Arm 的 TASKING VX-toolset

VX-toolset 是专为特定 Cortex-M 和 Cortex-R 核心器件设计的经认证编译器工具链，适用于安全关键型嵌入式软件开发。借助 Eclipse IDE 集成、高级多核支持和 TASKING BlueBox 调试程序兼容性，VX-toolset 简化了开发。已通过 TÜV NORD 认证，符合 ISO 26262 至 ASIL D 级以及 ISO 21434 标准。

来源：TASKING Germany GmbH
支持的产品和硬件
线上培训

AM62P-ACADEMY — AM62P Academy

AM62P Academy is designed to simplify and accelerate custom AM62Px development.
支持的产品和硬件
入门

TI-DEVELOPER-ZONE — Start embedded development on your desktop or in the cloud

From evaluation to deployment the TI Developer Zone provides a comprehensive range of software, tools and training to ensure that you have everything you need for each stage of the development process.
支持的产品和硬件
操作系统 (OS)

GHS-INTEGRITY-RTOS — Green Hills INTEGRITY RTOS

The flagship of Green Hills Software operating systems—the INTEGRITY RTOS—is built around a partitioning architecture to provide embedded systems with total reliability, absolute security, and maximum real-time performance. With its leadership pedigree underscored by certifications in a (...)
支持的产品和硬件
操作系统 (OS)

GHS-3P-UVELOSITY — Green Hills Software u-velOSity Safety RTOS

The µ-velOSity™ Safety RTOS is the smallest of Green Hills Software's real-time operating systems and was designed especially for microcontrollers. It supports a wide range of TI processor families using the Arm® Cortex-M or Cortex-R cores as a main CPU or as a co-processors (...)

来源：Green Hills Software
支持的产品和硬件
操作系统 (OS)

TRZN-3P-TORIZON-OS — Torizon OS 即用型工业嵌入式 Linux 发行版

Torizon OS 是一款免费的开源工业嵌入式 Linux 操作系统，专注于简化需要高可靠性和安全性的产品的开发与维护。除其他基本服务外，它还具有优化的容器运行时，以及用于安全离线和远程无线 (OTA) 更新、设备监控和远程访问的组件。Torizon OS 可通过简单定制在您的硬件上直接使用，默认具备安全性，拥有频繁的更新以及易用简洁的安全功能。基于开源软件的 Torizon OS 不存在锁定限制，完全免费，包括对 Toradex 系统级模块 (SoM) 的频繁更新。使用 Torizon OS 简化开发并符合网络安全要求。

来源：Torizon
支持的产品和硬件
操作系统 (OS)

WHIS-3P-SAFERTOS — WITTENSTEIN SafeRTOS 预先认证的安全 RTOS

SAFERTOS® 是专为嵌入式处理器设计的独特实时操作系统。它通过了 TÜV SÜD 的 IEC 61508 SIL3 和 ISO 26262 ASILD 标准的预先认证。SAFERTOS® 是由 WHIS 的专家团队专为安全而设计的，并在全球范围内用于安全关键型应用。WHIS 和德州仪器 (TI) 合作已有十多年。在此期间，WHIS 已将 SAFERTOS® 移植到各种 TI 处理器中，支持所有常用内核，并可按需提供其他架构。SAFERTOS® 针对您的特定处理器/编译器组合进行定制，并随附完整的源代码和设计保证包，在整个设计生命周期中提供完全透明度。许多 WHIS 客户使用 (...)

来源：WITTENSTEIN High Integrity Systems
支持的产品和硬件
应用软件和框架

CANDERA-3P-CGI-STUDIO — 适用于 AM62x Sitara™ 处理器的 Candera CGI Studio HMI 开发软件

支持的产品和硬件
固件

DDR-MARGIN-FW — Firmware and scripts to measure system DDR margin

The DDR margin firmware and supporting scripts allow visualization and measurement of system margin in the DDR interface on board. These tools enable probe-less measurement of critical data signals to understand the integrity and robustness of the interface.
支持的产品和硬件
评估模块 (EVM) 用 GUI

QT-3P-GUI — Qt-Group graphical user interface (GUI) software example demos for Arm-based processors

These Qt demos highlight the simplicity of bridging/importing graphics assets to Qt Design Studio where interactivity, animations, and pixel perfect UI/UX design is represented on the functioning display. With the QML code generated from Qt Design Studio, the HMI display created in Qt Design Studio (...)

来源：QT Group
支持的产品和硬件
支持软件

ICOMMS-SWS — CouthIT 工业通信软件工程服务

CouthIT 的 Embedded Software Group 专门开发用于 TI Sitara 和 Jacinto 微处理器和微控制器的高性能工业通信软件。

 

凭借硬件加速的 TI 工业通信子系统 (TI ICSS) 和 TI 通用平台以太网交换机 (TI CPSW)，CouthIT 提供了领先工业通信协议的优化、可立即用于生产环境的实现方案。

 

该公司还提供定制和集成服务，以满足独特的应用要求，帮助客户加快产品开发，同时确保强大可靠的通信性能。

支持的产品和硬件
支持软件

PROCESSOR-SDK-QNX-AM62P — Processor SDK QNX for AM62P

AM62P 处理器 Linux®、Android™ 和 TI MCU+ 软件开发套件 (SDK) 均为面向嵌入式处理器的统一软件平台，设置简单，可提供开箱即用的基准测试和演示。

这个 SDK 的所有版本在其适用的各个产品系列中都保持一致性，开发人员可以在各种产品中连续重复使用和开发软件。

支持的产品和硬件
支持软件

RIGHTWARE-3P-KANZI — Rightware Kanzi HMI development software for AM62x Sitara™ processors

Kanzi 是汽车专用 HMI 工具链，可提供高级 HMI 体验。通过将渲染流水线和资源管理有效映射到硬件的架构，它在 AM62P 系列等嵌入式硬件上实现了出色的性能/影响比。高效优化的渲染引擎意味着可在制造商全系车型仪表组显示屏上流畅运行现代化图形。整个行业的用户体验专家和创意专业人士都喜欢其令人印象深刻的设计能力。全球已有 50 多家 OEM 在生产中采用。

支持的产品和硬件
仿真模型

AM62P and AM62P-Q1 Thermal Model (Rev. A)

SPRM828A.ZIP (0 KB) - 热模型
支持的产品和硬件
仿真模型

AM62Px AMH SR 1.2 BSDL Model (Rev. A)

SPRM827A.ZIP (10 KB) - BSDL 模型
支持的产品和硬件
仿真模型

AM62Px AMH SR 1.2 IBIS Model (Rev. F)

SPRM825D (4643 KB) - IBIS 模型
支持的产品和硬件
仿真模型

AM62Px AMH SR 1.2 IBIS-AMI Model

SPRM826.ZIP (61927 KB) - IBIS-AMI 模型
支持的产品和硬件
模拟工具

AM62P-EMMC-BIT-PATTERN-SIM-TOOL — AM62P EVM eMMC HS400 SI 仿真位模式文本文件

This text file patterns are designed to exercise the system to real, but worst-case conditions in SI Simulation
支持的产品和硬件
计算工具

AM62P-PET-CALC — AM62P Power Estimation Tool

AM62P PET provides power consumption estimates based on measured and simulated data; they are provided “as is” and are not guaranteed within a specified precision.
支持的产品和硬件
封装 引脚 CAD 符号、封装和 3D 模型
FCBGA (AMH) 466 Ultra Librarian
适用于评估类项目的 TI 标准条款与条件。

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