SPRUIU1C July 2020 – February 2024 DRA821U , DRA821U-Q1
RMII interface clock RMII_50MHZ_CLK frequency is:
RMII_REF_CLK from device pin or internal RGMII_MHZ_50_CLK clock (default clock) can be used as the clock source for RMII interface. For more details on RMII clocking, please see CPSW0 Integration
CTRLMMR_CLKOUT_CTRL[4]CLK_EN and CTRLMMR_CLKOUT_CTRL[0]CLK_SEL bits are used to enable and select the clock source for CLKOUT device pin.