SPRUIU1C July 2020 – February 2024 DRA821U , DRA821U-Q1
Table 12-4265 lists the memory-mapped registers for the ELM. All register offset addresses not listed in Table 12-4265 should be considered as reserved locations and the register contents should not be modified.
Instance | Base Address |
---|---|
ELM0 | 0538 0000h |
Offset | Acronym | Register Name | ELM0 Physical Address |
---|---|---|---|
0h | ELM_REVISION | IP revision | 0538 0000h |
10h | ELM_SYSCONFIG | Module software reset and local power management register | 0538 0010h |
14h | ELM_SYSSTATUS | Internal reset monitoring | 0538 0014h |
18h | ELM_IRQSTATUS | Interrupt status register | 0538 0018h |
1Ch | ELM_IRQENABLE | Interrupt enable register | 0538 001Ch |
20h | ELM_LOCATION_CONFIG | ECC algorithm parameters | 0538 0020h |
80h | ELM_PAGE_CTRL | Page definition | 0538 0080h |
400h + formula | ELM_SYNDROME_FRAGMENT_0_i | Input syndrome polynomial bits 0 to 31 | 0538 0400h + formula |
404h + formula | ELM_SYNDROME_FRAGMENT_1_i | Input syndrome polynomial bits 32 to 63 | 0538 0404h + formula |
408h + formula | ELM_SYNDROME_FRAGMENT_2_i | Input syndrome polynomial bits 64 to 95 | 0538 0408h + formula |
40Ch + formula | ELM_SYNDROME_FRAGMENT_3_i | Input syndrome polynomial bits 96 to 127 | 0538 040Ch + formula |
410h + formula | ELM_SYNDROME_FRAGMENT_4_i | Input syndrome polynomial bits 128 to 159 | 0538 0410h + formula |
414h + formula | ELM_SYNDROME_FRAGMENT_5_i | Input syndrome polynomial bits 160 to 191 | 0538 0414h + formula |
418h + formula | ELM_SYNDROME_FRAGMENT_6_i | Input syndrome polynomial bits 192 to 207 | 0538 0418h + formula |
800h + formula | ELM_LOCATION_STATUS_i | Exit status for the syndrome polynomial processing | 0538 0800h + formula |
880h + formula | ELM_ERROR_LOCATION_0_i | Error-location register 0 | 0538 0880h + formula |
884h + formula | ELM_ERROR_LOCATION_1_i | Error-location register 1 | 0538 0884h + formula |
888h + formula | ELM_ERROR_LOCATION_2_i | Error-location register 2 | 0538 0888h + formula |
88Ch + formula | ELM_ERROR_LOCATION_3_i | Error-location register 3 | 0538 088Ch + formula |
890h + formula | ELM_ERROR_LOCATION_4_i | Error-location register 4 | 0538 0890h + formula |
894h + formula | ELM_ERROR_LOCATION_5_i | Error-location register 5 | 0538 0894h + formula |
898h + formula | ELM_ERROR_LOCATION_6_i | Error-location register 6 | 0538 0898h + formula |
89Ch + formula | ELM_ERROR_LOCATION_7_i | Error-location register 7 | 0538 089Ch + formula |
8A0h + formula | ELM_ERROR_LOCATION_8_i | Error-location register 8 | 0538 08A0h + formula |
8A4h + formula | ELM_ERROR_LOCATION_9_i | Error-location register 9 | 0538 08A4h + formula |
8A8h + formula | ELM_ERROR_LOCATION_10_i | Error-location register 10 | 0538 08A8h + formula |
8ACh + formula | ELM_ERROR_LOCATION_11_i | Error-location register 11 | 0538 08ACh + formula |
8B0h + formula | ELM_ERROR_LOCATION_12_i | Error-location register 12 | 0538 08B0h + formula |
8B4h + formula | ELM_ERROR_LOCATION_13_i | Error-location register 13 | 0538 08B4h + formula |
8B8h + formula | ELM_ERROR_LOCATION_14_i | Error-location register 14 | 0538 08B8h + formula |
8BCh + formula | ELM_ERROR_LOCATION_15_i | Error-location register 15 | 0538 08BCh + formula |
ELM_REVISION is shown in Figure 12-2163 and described in Table 12-4267.
This register contains the IP revision code.
(A write to or reset of this register has no effect.)
Instance | Physical Address |
---|---|
ELM0 | 0538 0000h |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
REVISION | |||||||||||||||||||||||||||||||
R-20h | |||||||||||||||||||||||||||||||
LEGEND: R = Read Only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | REVISION | R | 20h | TI internal data. Identifies revision of peripheral. |
ELM_SYSCONFIG is shown in Figure 12-2164 and described in Table 12-4269.
This register controls ELM local power management and software reset.
Some of the ELM features described in this section may not be supported on this family of devices. For more information, see ELM Not Supported Features.
Instance | Physical Address |
---|---|
ELM0 | 0538 0010h |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
RESERVED | |||||||
R-0h | |||||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||
R-0h | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
RESERVED | CLOCKACTIVITYOCP | ||||||
R-0h | R/W-0h | ||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | SIDLEMODE | RESERVED | SOFTRESET | AUTOGATING | |||
R-0h | R/W-2h | R-0h | R/W-0h | R/W-1h | |||
LEGEND: R = Read Only; R/W = Read/Write; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-9 | RESERVED | R | 0h | Reserved |
8 | CLOCKACTIVITYOCP | R/W | 0h | ELM_FICLK activity when module is in IDLE mode 0h (R/W) = ELM_FICLK can be switched off. 1h (R/W) = ELM_FICLK is maintained. |
7-5 | RESERVED | R | 0h | Reserved |
4-3 | SIDLEMODE | R/W | 2h | Slave interface power management (clock stop req/ack control) 0h (R/W) = Force-idle. A clock stop request is acknowledged unconditionally and immediately 1h (R/W) = No-idle. A clock stop request is never acknowledged. 2h (R/W) = Smart-idle. The acknowledgment to a clock stop request is given based on the internal activity. 3h (R/W) = Reserved — do not use |
2 | RESERVED | R | 0h | Reserved |
1 | SOFTRESET | R/W | 0h | Module software reset 0h (R/W) = Normal mode 1h (R/W) = Start soft reset sequence. |
0 | AUTOGATING | R/W | 1h | Internal ELM_FICLK gating strategy 0h (R/W) = ELM_FICLK is free-running. 1h (R/W) = Automatic internal ELM_FICLK gating strategy is applied based on the Interconnect interface activity. |
ELM_SYSSTATUS is shown in Figure 12-2165 and described in Table 12-4271.
Internal reset monitoring
Undefined since:
From hardware perspective, the reset state is 0.
From software user perspective, when the accessible module is 1.
Instance | Physical Address |
---|---|
ELM0 | 0538 0014h |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
RESERVED | |||||||
R-0h | |||||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||
R-0h | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
RESERVED | |||||||
R-0h | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | RESETDONE | ||||||
R-0h | R-0h | ||||||
LEGEND: R = Read Only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-1 | RESERVED | R | 0h | Reserved |
0 | RESETDONE | R | 0h | Internal reset monitoring 0h (R) = Reset is ongoing. 1h (R) = Reset is done (completed). |
ELM_IRQSTATUS is shown in Figure 12-2166 and described in Table 12-4273.
Interrupt status. This register doubles as a status register for the error-location processes.
Instance | Physical Address |
---|---|
ELM0 | 0538 0018h |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
RESERVED | |||||||
R-0h | |||||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||
R-0h | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
RESERVED | PAGE_VALID | ||||||
R-0h | R/W1C-0h | ||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
LOC_VALID_7 | LOC_VALID_6 | LOC_VALID_5 | LOC_VALID_4 | LOC_VALID_3 | LOC_VALID_2 | LOC_VALID_1 | LOC_VALID_0 |
R/W1C-0h | R/W1C-0h | R/W1C-0h | R/W1C-0h | R/W1C-0h | R/W1C-0h | R/W1C-0h | R/W1C-0h |
LEGEND: R = Read Only; R/W1C = Read/Write 1 to Clear Bit; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-9 | RESERVED | R | 0h | Reserved |
8 | PAGE_VALID | R/W1C | 0h | Error-location status for a full page, based on the mask definition |
7 | LOC_VALID_7 | R/W1C | 0h | Error-location status for syndrome polynomial 7 |
6 | LOC_VALID_6 | R/W1C | 0h | Error-location status for syndrome polynomial 6 |
5 | LOC_VALID_5 | R/W1C | 0h | Error-location status for syndrome polynomial 5 |
4 | LOC_VALID_4 | R/W1C | 0h | Error-location status for syndrome polynomial 4 |
3 | LOC_VALID_3 | R/W1C | 0h | Error-location status for syndrome polynomial 3 |
2 | LOC_VALID_2 | R/W1C | 0h | Error-location status for syndrome polynomial 2 |
1 | LOC_VALID_1 | R/W1C | 0h | Error-location status for syndrome polynomial 1 |
0 | LOC_VALID_0 | R/W1C | 0h | Error-location status for syndrome polynomial 0 |
ELM_IRQENABLE is shown in Figure 12-2167 and described in Table 12-4275.
Interrupt enable.
Instance | Physical Address |
---|---|
ELM0 | 0538 001Ch |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
RESERVED | |||||||
R-0h | |||||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||
R-0h | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
RESERVED | PAGE_MASK | ||||||
R-0h | R/W-0h | ||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
LOCATION_MASK_7 | LOCATION_MASK_6 | LOCATION_MASK_5 | LOCATION_MASK_4 | LOCATION_MASK_3 | LOCATION_MASK_2 | LOCATION_MASK_1 | LOCATION_MASK_0 |
R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h |
LEGEND: R = Read Only; R/W = Read/Write; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-9 | RESERVED | R | 0h | Reserved |
8 | PAGE_MASK | R/W | 0h | Page interrupt mask bit |
7 | LOCATION_MASK_7 | R/W | 0h | Error-location interrupt mask bit for syndrome polynomial 7 |
6 | LOCATION_MASK_6 | R/W | 0h | Error-location interrupt mask bit for syndrome polynomial 6 |
5 | LOCATION_MASK_5 | R/W | 0h | Error-location interrupt mask bit for syndrome polynomial 5 |
4 | LOCATION_MASK_4 | R/W | 0h | Error-location interrupt mask bit for syndrome polynomial 4 |
3 | LOCATION_MASK_3 | R/W | 0h | Error-location interrupt mask bit for syndrome polynomial 3 |
2 | LOCATION_MASK_2 | R/W | 0h | Error-location interrupt mask bit for syndrome polynomial 2 |
1 | LOCATION_MASK_1 | R/W | 0h | Error-location interrupt mask bit for syndrome polynomial 1 |
0 | LOCATION_MASK_0 | R/W | 0h | Error-location interrupt mask bit for syndrome polynomial 0 |
ELM_LOCATION_CONFIG is shown in Figure 12-2168 and described in Table 12-4277.
ECC algorithm parameters.
Instance | Physical Address |
---|---|
ELM0 | 0538 0020h |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
RESERVED | ECC_SIZE | ||||||
R-0h | R/W-0h | ||||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
ECC_SIZE | |||||||
R/W-0h | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
RESERVED | |||||||
R-0h | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | ECC_BCH_LEVEL | ||||||
R-0h | R/W-0h | ||||||
LEGEND: R = Read Only; R/W = Read/Write; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-27 | RESERVED | R | 0h | Reserved |
26-16 | ECC_SIZE | R/W | 0h | Maximum size of the buffers for which the error-location engine is used, in number of nibbles (4-bit entities) |
15-2 | RESERVED | R | 0h | Reserved |
1-0 | ECC_BCH_LEVEL | R/W | 0h | Error correction level |
ELM_PAGE_CTRL is shown in Figure 12-2169 and described in Table 12-4279.
Page definition.
Instance | Physical Address |
---|---|
ELM0 | 0538 0080h |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
RESERVED | |||||||
R-0h | |||||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||
R-0h | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
RESERVED | |||||||
R-0h | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
SECTOR_7 | SECTOR_6 | SECTOR_5 | SECTOR_4 | SECTOR_3 | SECTOR_2 | SECTOR_1 | SECTOR_0 |
R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h |
LEGEND: R = Read Only; R/W = Read/Write; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-8 | RESERVED | R | 0h | Reserved |
7 | SECTOR_7 | R/W | 0h | Set to 1 if syndrome polynomial 7 is part of the page in page mode. Must be 0 in continuous mode. |
6 | SECTOR_6 | R/W | 0h | Set to 1 if syndrome polynomial 6 is part of the page in page mode. Must be 0 in continuous mode. |
5 | SECTOR_5 | R/W | 0h | Set to 1 if syndrome polynomial 5 is part of the page in page mode. Must be 0 in continuous mode. |
4 | SECTOR_4 | R/W | 0h | Set to 1 if syndrome polynomial 4 is part of the page in page mode. Must be 0 in continuous mode. |
3 | SECTOR_3 | R/W | 0h | Set to 1 if syndrome polynomial 3 is part of the page in page mode. Must be 0 in continuous mode. |
2 | SECTOR_2 | R/W | 0h | Set to 1 if syndrome polynomial 2 is part of the page in page mode. Must be 0 in continuous mode. |
1 | SECTOR_1 | R/W | 0h | Set to 1 if syndrome polynomial 1 is part of the page in page mode. Must be 0 in continuous mode. |
0 | SECTOR_0 | R/W | 0h | Set to 1 if syndrome polynomial 0 is part of the page in page mode. Must be 0 in continuous mode. |
ELM_SYNDROME_FRAGMENT_0_i (where i = 0 to 7) is shown in Figure 12-2170 and described in Table 12-4281.
Input syndrome polynomial bits 0 to 31.
Offset = 400h + (i * 40h), where: i = 0 to 7
Instance | Physical Address |
---|---|
ELM0 | 0538 0400h + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
SYNDROME_0 | |||||||||||||||||||||||||||||||
R/W-0h | |||||||||||||||||||||||||||||||
LEGEND: R/W = Read/Write; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | SYNDROME_0 | R/W | 0h | Syndrome bits 0 to 31 |
ELM_SYNDROME_FRAGMENT_1_i (where i = 0 to 7) is shown in Figure 12-2171 and described in Table 12-4283.
Input syndrome polynomial bits 32 to 63.
Offset = 404h + (i * 40h), where: i = 0 to 7
Instance | Physical Address |
---|---|
ELM0 | 0538 0404h + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
SYNDROME_1 | |||||||||||||||||||||||||||||||
R/W-0h | |||||||||||||||||||||||||||||||
LEGEND: R/W = Read/Write; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | SYNDROME_1 | R/W | 0h | Syndrome bits 32 to 63 |
ELM_SYNDROME_FRAGMENT_2_i (where i = 0 to 7) is shown in Figure 12-2172 and described in Table 12-4285.
Input syndrome polynomial bits 64 to 95.
Offset = 408h + (i * 40h), where: i = 0 to 7
Instance | Physical Address |
---|---|
ELM0 | 0538 0408h + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
SYNDROME_2 | |||||||||||||||||||||||||||||||
R/W-0h | |||||||||||||||||||||||||||||||
LEGEND: R/W = Read/Write; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | SYNDROME_2 | R/W | 0h | Syndrome bits 64 to 95 |
ELM_SYNDROME_FRAGMENT_3_i (where i = 0 to 7) is shown in Figure 12-2173 and described in Table 12-4287.
Input syndrome polynomial bits 96 to 127.
Offset = 40Ch + (i * 40h), where: i = 0 to 7
Instance | Physical Address |
---|---|
ELM0 | 0538 040Ch + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
SYNDROME_3 | |||||||||||||||||||||||||||||||
R/W-0h | |||||||||||||||||||||||||||||||
LEGEND: R/W = Read/Write; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | SYNDROME_3 | R/W | 0h | Syndrome bits 96 to 127 |
ELM_SYNDROME_FRAGMENT_4_i (where i = 0 to 7) is shown in Figure 12-2174 and described in Table 12-4289.
Input syndrome polynomial bits 128 to 159.
Offset = 410h + (i * 40h), where: i = 0 to 7
Instance | Physical Address |
---|---|
ELM0 | 0538 0410h + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
SYNDROME_4 | |||||||||||||||||||||||||||||||
R/W-0h | |||||||||||||||||||||||||||||||
LEGEND: R/W = Read/Write; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | SYNDROME_4 | R/W | 0h | Syndrome bits 128 to 159 |
ELM_SYNDROME_FRAGMENT_5_i (where i = 0 to 7) is shown in Figure 12-2175 and described in Table 12-4291.
Input syndrome polynomial bits 160 to 191.
Offset = 414h + (i * 40h), where: i = 0 to 7
Instance | Physical Address |
---|---|
ELM0 | 0538 0414h + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
SYNDROME_5 | |||||||||||||||||||||||||||||||
R/W-0h | |||||||||||||||||||||||||||||||
LEGEND: R/W = Read/Write; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | SYNDROME_5 | R/W | 0h | Syndrome bits 160 to 191 |
ELM_SYNDROME_FRAGMENT_6_i (where i = 0 to 7) is shown in Figure 12-2176 and described in Table 12-4293.
Input syndrome polynomial bits 192 to 207.
Offset = 418h + (i * 40h), where: i = 0 to 7
Instance | Physical Address |
---|---|
ELM0 | 0538 0418h + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
RESERVED | |||||||
R-0h | |||||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | SYNDROME_VALID | ||||||
R-0h | R/W-0h | ||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
SYNDROME_6 | |||||||
R/W-0h | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
SYNDROME_6 | |||||||
R/W-0h | |||||||
LEGEND: R = Read Only; R/W = Read/Write; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-17 | RESERVED | R | 0h | Reserved |
16 | SYNDROME_VALID | R/W | 0h | Syndrome valid bit |
15-0 | SYNDROME_6 | R/W | 0h | Syndrome bits 192 to 207 |
ELM_LOCATION_STATUS_i (where i = 0 to 7) is shown in Figure 12-2177 and described in Table 12-4295.
Exit status for the syndrome polynomial processing.
Offset = 800h + (i * 100h), where: i = 0 to 7
Instance | Physical Address |
---|---|
ELM0 | 0538 0800h + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
RESERVED | |||||||
R-0h | |||||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||
R-0h | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
RESERVED | ECC_CORRECTABLE | ||||||
R-0h | R-0h | ||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | ECC_NB_ERRORS | ||||||
R-0h | R-0h | ||||||
LEGEND: R = Read Only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-9 | RESERVED | R | 0h | Reserved |
8 | ECC_CORRECTABLE | R | 0h | Error-location process exit status |
7-5 | RESERVED | R | 0h | Reserved |
4-0 | ECC_NB_ERRORS | R | 0h | Number of errors detected and located |
ELM_ERROR_LOCATION_0_i (where i = 0 to 7) is shown in Figure 12-2178 and described in Table 12-4297.
Error-location register 0.
Offset = 880h + (i * 100h), where: i = 0 to 7
Instance | Physical Address |
---|---|
ELM0 | 0538 0880h + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||||||||||
R-0h | |||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | ECC_ERROR_LOCATION | ||||||||||||||
R-0h | R-0h | ||||||||||||||
LEGEND: R = Read Only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-13 | RESERVED | R | 0h | Reserved |
12-0 | ECC_ERROR_LOCATION | R | 0h | Error-location bit address |
ELM_ERROR_LOCATION_1_i (where i = 0 to 7) is shown in Figure 12-2179 and described in Table 12-4299.
Error-location register 1.
Offset = 884h + (i * 100h), where: i = 0 to 7
Instance | Physical Address |
---|---|
ELM0 | 0538 0884h + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||||||||||
R-0h | |||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | ECC_ERROR_LOCATION | ||||||||||||||
R-0h | R-0h | ||||||||||||||
LEGEND: R = Read Only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-13 | RESERVED | R | 0h | Reserved |
12-0 | ECC_ERROR_LOCATION | R | 0h | Error-location bit address |
ELM_ERROR_LOCATION_2_i (where i = 0 to 7) is shown in Figure 12-2180 and described in Table 12-4301.
Error-location register 2.
Offset = 888h + (i * 100h), where: i = 0 to 7
Instance | Physical Address |
---|---|
ELM0 | 0538 0888h + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||||||||||
R-0h | |||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | ECC_ERROR_LOCATION | ||||||||||||||
R-0h | R-0h | ||||||||||||||
LEGEND: R = Read Only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-13 | RESERVED | R | 0h | Reserved |
12-0 | ECC_ERROR_LOCATION | R | 0h | Error-location bit address |
ELM_ERROR_LOCATION_3_i (where i = 0 to 7) is shown in Figure 12-2181 and described in Table 12-4303.
Error-location register 3.
Offset = 88Ch + (i * 100h), where: i = 0 to 7
Instance | Physical Address |
---|---|
ELM0 | 0538 088Ch + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||||||||||
R-0h | |||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | ECC_ERROR_LOCATION | ||||||||||||||
R-0h | R-0h | ||||||||||||||
LEGEND: R = Read Only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-13 | RESERVED | R | 0h | Reserved |
12-0 | ECC_ERROR_LOCATION | R | 0h | Error-location bit address |
ELM_ERROR_LOCATION_4_i (where i = 0 to 7) is shown in Figure 12-2182 and described in Table 12-4305.
Error-location register 4.
Offset = 890h + (i * 100h), where: i = 0 to 7
Instance | Physical Address |
---|---|
ELM0 | 0538 0890h + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||||||||||
R-0h | |||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | ECC_ERROR_LOCATION | ||||||||||||||
R-0h | R-0h | ||||||||||||||
LEGEND: R = Read Only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-13 | RESERVED | R | 0h | Reserved |
12-0 | ECC_ERROR_LOCATION | R | 0h | Error-location bit address |
ELM_ERROR_LOCATION_5_i (where i = 0 to 7) is shown in Figure 12-2183 and described in Table 12-4307.
Error-location register 5.
Offset = 894h + (i * 100h), where: i = 0 to 7
Instance | Physical Address |
---|---|
ELM0 | 0538 0894h + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||||||||||
R-0h | |||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | ECC_ERROR_LOCATION | ||||||||||||||
R-0h | R-0h | ||||||||||||||
LEGEND: R = Read Only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-13 | RESERVED | R | 0h | Reserved |
12-0 | ECC_ERROR_LOCATION | R | 0h | Error-location bit address |
ELM_ERROR_LOCATION_6_i (where i = 0 to 7) is shown in Figure 12-2184 and described in Table 12-4309.
Error-location register 6.
Offset = 898h + (i * 100h), where: i = 0 to 7
Instance | Physical Address |
---|---|
ELM0 | 0538 0898h + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||||||||||
R-0h | |||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | ECC_ERROR_LOCATION | ||||||||||||||
R-0h | R-0h | ||||||||||||||
LEGEND: R = Read Only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-13 | RESERVED | R | 0h | Reserved |
12-0 | ECC_ERROR_LOCATION | R | 0h | Error-location bit address |
ELM_ERROR_LOCATION_7_i (where i = 0 to 7) is shown in Figure 12-2185 and described in Table 12-4311.
Error-location register 7.
Offset = 89Ch + (i * 100h), where: i = 0 to 7
Instance | Physical Address |
---|---|
ELM0 | 0538 089Ch + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||||||||||
R-0h | |||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | ECC_ERROR_LOCATION | ||||||||||||||
R-0h | R-0h | ||||||||||||||
LEGEND: R = Read Only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-13 | RESERVED | R | 0h | Reserved |
12-0 | ECC_ERROR_LOCATION | R | 0h | Error-location bit address |
ELM_ERROR_LOCATION_8_i (where i = 0 to 7) is shown in Figure 12-2186 and described in Table 12-4313.
Error-location register 8.
Offset = 8A0h + (i * 100h), where: i = 0 to 7
Instance | Physical Address |
---|---|
ELM0 | 0538 08A0h + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||||||||||
R-0h | |||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | ECC_ERROR_LOCATION | ||||||||||||||
R-0h | R-0h | ||||||||||||||
LEGEND: R = Read Only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-13 | RESERVED | R | 0h | Reserved |
12-0 | ECC_ERROR_LOCATION | R | 0h | Error-location bit address |
ELM_ERROR_LOCATION_9_i (where i = 0 to 7) is shown in Figure 12-2187 and described in Table 12-4315.
Error-location register 9.
Offset = 8A4h + (i * 100h), where: i = 0 to 7
Instance | Physical Address |
---|---|
ELM0 | 0538 08A4h + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||||||||||
R-0h | |||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | ECC_ERROR_LOCATION | ||||||||||||||
R-0h | R-0h | ||||||||||||||
LEGEND: R = Read Only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-13 | RESERVED | R | 0h | Reserved |
12-0 | ECC_ERROR_LOCATION | R | 0h | Error-location bit address |
ELM_ERROR_LOCATION_10_i (where i = 0 to 7) is shown in Figure 12-2188 and described in Table 12-4317.
Error-location register 10.
Offset = 8A8h + (i * 100h), where: i = 0 to 7
Instance | Physical Address |
---|---|
ELM0 | 0538 08A8h + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||||||||||
R-0h | |||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | ECC_ERROR_LOCATION | ||||||||||||||
R-0h | R-0h | ||||||||||||||
LEGEND: R = Read Only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-13 | RESERVED | R | 0h | Reserved |
12-0 | ECC_ERROR_LOCATION | R | 0h | Error-location bit address |
ELM_ERROR_LOCATION_11_i (where i = 0 to 7) is shown in Figure 12-2189 and described in Table 12-4319.
Error-location register 11.
Offset = 8ACh + (i * 100h), where: i = 0 to 7
Instance | Physical Address |
---|---|
ELM0 | 0538 08ACh + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||||||||||
R-0h | |||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | ECC_ERROR_LOCATION | ||||||||||||||
R-0h | R-0h | ||||||||||||||
LEGEND: R = Read Only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-13 | RESERVED | R | 0h | Reserved |
12-0 | ECC_ERROR_LOCATION | R | 0h | Error-location bit address |
ELM_ERROR_LOCATION_12_i (where i = 0 to 7) is shown in Figure 12-2190 and described in Table 12-4321.
Error-location register 12.
Offset = 8B0h + (i * 100h), where: i = 0 to 7
Instance | Physical Address |
---|---|
ELM0 | 0538 08B0h + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||||||||||
R-0h | |||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | ECC_ERROR_LOCATION | ||||||||||||||
R-0h | R-0h | ||||||||||||||
LEGEND: R = Read Only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-13 | RESERVED | R | 0h | Reserved |
12-0 | ECC_ERROR_LOCATION | R | 0h | Error-location bit address |
ELM_ERROR_LOCATION_13_i (where i = 0 to 7) is shown in Figure 12-2191 and described in Table 12-4323.
Error-location register 13.
Offset = 8B4h + (i * 100h), where: i = 0 to 7
Instance | Physical Address |
---|---|
ELM0 | 0538 08B4h + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||||||||||
R-0h | |||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | ECC_ERROR_LOCATION | ||||||||||||||
R-0h | R-0h | ||||||||||||||
LEGEND: R = Read Only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-13 | RESERVED | R | 0h | Reserved |
12-0 | ECC_ERROR_LOCATION | R | 0h | Error-location bit address |
ELM_ERROR_LOCATION_14_i (where i = 0 to 7) is shown in Figure 12-2192 and described in Table 12-4325.
Error-location register 14.
Offset = 8B8h + (i * 100h), where: i = 0 to 7
Instance | Physical Address |
---|---|
ELM0 | 0538 08B8h + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||||||||||
R-0h | |||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | ECC_ERROR_LOCATION | ||||||||||||||
R-0h | R-0h | ||||||||||||||
LEGEND: R = Read Only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-13 | RESERVED | R | 0h | Reserved |
12-0 | ECC_ERROR_LOCATION | R | 0h | Error-location bit address |
ELM_ERROR_LOCATION_15_i (where i = 0 to 7) is shown in Figure 12-2193 and described in Table 12-4327.
Error-location register 15.
Offset = 8BCh + (i * 100h), where: i = 0 to 7
Instance | Physical Address |
---|---|
ELM0 | 0538 08BCh + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||||||||||
R-0h | |||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | ECC_ERROR_LOCATION | ||||||||||||||
R-0h | R-0h | ||||||||||||||
LEGEND: R = Read Only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-13 | RESERVED | R | 0h | Reserved |
12-0 | ECC_ERROR_LOCATION | R | 0h | Error-location bit address |