SPRUIU1C July 2020 – February 2024 DRA821U , DRA821U-Q1
Table 11-136 shows the mapping of timesync event sources to PCIE1_CPTS0 hardware push inputs.
Module Event Input | Event Source | Description | Type |
---|---|---|---|
PCIE1_CPTS0_HW1_PUSH | PCIE1_PTM0_CORR_TIME_EVT_0 | PCIE1_PTM0 corrected time event | – |
PCIE1_CPTS0_HW2_PUSH | TIMESYNC_INTRTR0_OUTL_21 | TIMESYNC_INTRTR0 selectable timesync event 21 | Level |