SPRUIU1C July 2020 – February 2024 DRA821U , DRA821U-Q1
The A72SS does not have an integrated watchdog timer. Instead, this feature is provided externally by the Real Time Interrupt (RTI) module, which implements a windowed watchdog timer capable of issuing warm reset to the SoC, when necessary.
There are two RTI modules in the MAIN domain that are assigned to the A72 cores:
For more details on the RTI windowed watchdog feature, see Real Time Interrupt Module (RTI).