SPRUIU1C July 2020 – February 2024 DRA821U , DRA821U-Q1
Table 10-596 lists the memory-mapped registers for the UDMASS_INTA0_CFG_L2G. All register offset addresses not listed in Table 10-596 should be considered as reserved locations and the register contents should not be modified.
The 'Local to Global' Registers region is accessed by setting the cfg_rsel signal to 3 during the access. The address map for this region is as follows:
Instance | Base Address |
---|---|
NAVSS0_UDMASS_INTA0_CFG_L2G | 3110 0000h |
MCU_NAVSS0_UDMASS_INTA0_CFG_L2G | 2857 0000h |
Offset | Acronym | Register Name | NAVSS0_UDMASS_INTA0_CFG_L2G Physical Address | MCU_NAVSS0_UDMASS_INTA0_CFG_L2G Physical Address |
---|---|---|---|---|
0h + formula | UDMA_INTA_MAP_j | Local to global event mapping | 3110 0000h + formula | 28570000h + formula |
UDMA_INTA_MAP_j is shown in Figure 10-220 and described in Table 10-598.
Return to Summary Table.
This register determines how the ordinal local event is translated to a global event on the outgoing event transport lane. Both pulse and rising edge local event types are supported. With pulsed events, the event count is determined by the number of cycles for which the event signal remains high. For rising edge events, the count represents the total number of rising edge transitions. The index field of the register determines the outgoing global event index, and the mode bit specifies either pulsed or rising edge local event detection.
Offset = 0h + (j * 20h); where j = 0h to
Instance | Physical Address |
---|---|
NAVSS0_UDMASS_INTA0_CFG_L2G | 3110 0000h + formula |
MCU_NAVSS0_UDMASS_INTA0_CFG_L2G | 2857 0000h + formula |
63 | 62 | 61 | 60 | 59 | 58 | 57 | 56 |
RESERVED | |||||||
R/W-X | |||||||
55 | 54 | 53 | 52 | 51 | 50 | 49 | 48 |
RESERVED | |||||||
R/W-X | |||||||
47 | 46 | 45 | 44 | 43 | 42 | 41 | 40 |
RESERVED | |||||||
R/W-X | |||||||
39 | 38 | 37 | 36 | 35 | 34 | 33 | 32 |
RESERVED | |||||||
R/W-X | |||||||
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
MODE | RESERVED | ||||||
R/W-0h | R/W-X | ||||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||
R/W-X | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
GEVIDX | |||||||
R/W-FFFFh | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
GEVIDX | |||||||
R/W-FFFFh | |||||||
LEGEND: R/W = Read/Write; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
63-32 | RESERVED | R/W | X | |
31 | MODE | R/W | 0h | Local event detection mode. This field is set to 0 for pulsed events, and to 1 for rising edge eventss |
30-16 | RESERVED | R/W | X | |
15-0 | GEVIDX | R/W | FFFFh | Global event index. This field specifies the index of the outgoing global event. Set to 0xFFFF to disable. |