SPRUIU1C July 2020 – February 2024 DRA821U , DRA821U-Q1
Table 12-4131 describes the local power-management features available for the GPMC module.
Feature | Registers | Description |
---|---|---|
Clock autogating | GPMC_SYSCONFIG[0] AUTOIDLE | This bit allows a local power optimization inside the module, by gating the GPMC_ICLK clock upon the internal activity. |
Target idle modes | GPMC_SYSCONFIG[4-3] SIDLEMODE | Force-idle, no-idle and smart-idle modes are available. |