SPRUIU1C July 2020 – February 2024 DRA821U , DRA821U-Q1
OSPI provides Flash reset out ports. These ports are active low and controlled thru OSPI_CONFIG_REG register.
The controller provide Flash reset out ports. These ports are active low and controlled thru the Config_reg(0x0)[5].reset_cfg_fld and cofnig_reg(0x0)[6].reset_pin_fld.
The register fields control the ospi_reset_out[3:0] mentioned in section 7.1.24 of the functional spec.