SPRUIU1C July 2020 – February 2024 DRA821U , DRA821U-Q1
Asynchronous page write mode is not supported. PAGEBURSTACCESSTIME is irrelevant in this case.
In synchronous burst write mode, PAGEBURSTACCESSTIME controls the delay between successive memory device word captures in a burst.
The external WAIT signal can be used in conjunction with PAGEBURSTACCESSTIME to control the effective memory device data capture GPMC output clock edge in synchronous write mode. For more information about wait monitoring, see Section 12.3.4.4.7.3.1, WAIT Pin Monitoring Control.