SPRUIU1C July 2020 – February 2024 DRA821U , DRA821U-Q1
Table 10-488 lists the memory-mapped registers for the NAVSS0_PROXY_BUF. All register offset addresses not listed in Table 10-488 should be considered as reserved locations and the register contents should not be modified.
Proxy Buffer RAM Debug region.
Instance | Base Address |
---|---|
NAVSS0_PROXY_BUF | 3113 0000h |
MCU_NAVSS0_PROXY_CFG_BUF | 285A 0000h |
Offset | Acronym | Register Name | NAVSS0_PROXY_BUF Physical Address | MCU_NAVSS0_PROXY_CFG_BUF Physical Address |
---|---|---|---|---|
0h + formula | PROXY_DATA_y | Proxy Buffer Register | 3113 0000h + formula | 285A 0000h + formula |
PROXY_DATA_y is shown in Figure 10-181 and described in Table 10-490.
Return to Summary Table.
The Proxy Buffer for the proxy
Offset = 0h + (y * 4h); where y = 0h to FFFh
Instance | Physical Address |
---|---|
NAVSS0_PROXY_BUF | 3113 0000h + formula |
MCU_NAVSS0_PROXY_CFG_BUF | 285A 0000h + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
VAL | |||||||||||||||||||||||||||||||
R/W-0h | |||||||||||||||||||||||||||||||
LEGEND: R/W = Read/Write; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | VAL | R/W | 0h | Proxy Buffer Data |