SPRUIU1C July 2020 – February 2024 DRA821U , DRA821U-Q1
Address Offset | Register |
---|---|
0x00 | Revision Register |
0x04 | Configuration Register |
0x08 | Info Register |
0x0C | Enable Register |
0x10 | Flush Register |
0x14 | Timeout Value Register |
0x18 | Timer Register |
0x1C | Reserved |
0x20 | Error Interrupt Raw Status/Set Register |
0x24 | Error Interrupt Enabled Status/Clear Register |
0x28 | Error Interrupt Mask Set Register |
0x2C | Error Interrupt Mask Clear Register |
0x30 | Timeout Error Info Register |
0x34 | Unexpected Response Info Register |
0x38 | Error Transaction Valid/Dir/ID Register |
0x3C | Error Transaction RouteID/OrderID Register |
0x40 | Error Transaction Bytecnt Register |
0x44 | Error Transaction Upper Address Register |
0x48 | Error Transaction Lower Address Register |
0x4C | Error Transaction Timestamp Register |