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实时电机控制和自动化 MCU

AM263P2

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AM263P2

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CPU Arm Cortex-R5F ADC type 5 12-bit SAR Total processing (MIPS) 0.0008 Features Automation, CAN, CAN FD, EnDat 2.2, EtherCAT, EtherNet/IP, Ethernet, External memory interface, Hardware encryption (AES/DES/SHA/MD5), I2C, IO-Link, Integrated industrial protocols, OSPI, Profinet, QSPI, SD/SDIO, SPI, UART UART 6 CAN (#) 8 (CAN-FD) PWM (Ch) 64 Security Cryptographic acceleration, Device lifecycle management, Secure boot, Secure debug, Secure provisioning Number of ADC channels 30 SPI 8 Operating temperature range (°C) -40 to 125 Rating Catalog Communication interface CAN, CAN-FD, I2C, OSPI, QSPI, SD/SDIO, SPI, UART Operating system BareMetal (No OS), FreeRTOS, ThreadX Hardware accelerators Trigonometric math accelerator Edge AI enabled Yes Number of GPIOs 140
CPU Arm Cortex-R5F ADC type 5 12-bit SAR Total processing (MIPS) 0.0008 Features Automation, CAN, CAN FD, EnDat 2.2, EtherCAT, EtherNet/IP, Ethernet, External memory interface, Hardware encryption (AES/DES/SHA/MD5), I2C, IO-Link, Integrated industrial protocols, OSPI, Profinet, QSPI, SD/SDIO, SPI, UART UART 6 CAN (#) 8 (CAN-FD) PWM (Ch) 64 Security Cryptographic acceleration, Device lifecycle management, Secure boot, Secure debug, Secure provisioning Number of ADC channels 30 SPI 8 Operating temperature range (°C) -40 to 125 Rating Catalog Communication interface CAN, CAN-FD, I2C, OSPI, QSPI, SD/SDIO, SPI, UART Operating system BareMetal (No OS), FreeRTOS, ThreadX Hardware accelerators Trigonometric math accelerator Edge AI enabled Yes Number of GPIOs 140
NFBGA (ZCZ) 324 225 mm² (15 mm × 15 mm)

Processor Cores:

  • Single, dual, and quad-core Arm Cortex-R5F MCU with each core running up to 400MHz
    • 16KB I-cache with 64-bit ECC per CPU core
    • 16KB D-cache with 32-bit ECC per CPU core
    • x256 integrated VIM per CPU Core
    • 256KB Tightly-Coupled Memory (TCM) with 32-bit ECC per CPU core cluster
    • Lockstep or Dual-core capable clusters
  • Trigonometric Math Unit (TMU) for accelerating trigonometric functions
    • Up to 4x, one per R5F MCU core

Memory:

  • 1x Flash Subsystem with OptiFlash memory technology and eXecute In Place (XIP) support
    • 1x Octal Serial Peripheral Interface (OSPI), up to 133MHz SDR and DDR
    • AM263P Flash-in-Package (ZCZ_F) variant includes 8MB OSPI Flash
  • 3MB of On-Chip RAM (OCSRAM)
    • 6 Banks x 512KB
    • ECC error protection
    • Internal DMA engine support
    • Remote L2 Cache for external memory, software programmable up to 128KB per CPU core

System on Chip (SoC) Services and Architecture:

  • 1x EDMA to support data movement functions
    • 2x Transfer Controllers (TPTC)
    • 1x Channel Controller (TPCC)
  • Device Boot supported from the following interfaces:
    • UART (Primary/Backup)
    • QSPI NOR Flash (4S/1S) (Primary)
    • OSPI NOR Flash (8S 50MHz SDR Mode0, 8S 25MHz DDR XSPI) (Primary)
  • Interprocessor communication modules
    • SPINLOCK module for synchronizing processes running on multiple cores
    • MAILBOX functionality implemented through CTRLMMR registers
  • Central Platform Time Sync (CPTS) support with time-sync and compare-event interrupt routers
  • Timer Modules:
    • 4x Windowed Watchdog Timer (WWDT)
    • 8x Real Time Interrupt (RTI) timer

General Connectivity:

  • 6x Universal Asynchronous RX-TX (UART)
  • 8x Serial Peripheral Interface (SPI) controllers
  • 5x Local Interconnect Network (LIN) ports
  • 4x Inter-Integrated Circuit (I2C) ports
  • 8x Modular Controller Area Network (MCAN) modules with CAN-FD support
  • 4x Fast Serial Interface Transmitters (FSITX)
  • 4x Fast Serial Interface Receivers (FSIRX)
  • Up to 139 General-Purpose I/O (GPIO) pins

Sensing & Actuation:

  • Real-time Control Subsystem (CONTROLSS)
  • Flexible Input/Output Crossbars (XBAR)
  • 5x 12-bit Analog-to-Digital Converters (ADC)
    • 6-input SAR ADC up to 4MSPS
      • 6x Single-ended channels OR
      • 3x Differential channels
    • Highly Configurable ADC Digital Logic
      • XBAR Start of Conversion Triggers (SOC)
      • User-defined Sample and Hold (S+H)
      • Flexible Post-processing Blocks (PPB)
  • 1x Resolver subsystem (ZCZ-S and ZCZ-F packages) with:
    • 2x Resolver to Digital Converter (RDC) OR
    • 2x 12-bit ADCs can also be used for general purpose
      • 4-input SAR ADC up to 3MSPS
        • 4x Single-ended channels OR
        • 2x Differential channels
  • 10x Analog Comparators with Type-A programmable DAC reference (CMPSSA)
  • 10x Analog Comparators with Type-B programmable DAC reference (CMPSSB)
  • 1x 12-bit Digital-to-Analog Converter (DAC)
  • 32x Pulse Width Modulation (EPWM) modules
    • Single or Dual PWM channels
    • Advanced PWM Configurations
    • Extended HRPWM time resolution
  • 16x Enhanced Capture (ECAP) modules
  • 3x Enhanced Quadrature Encoder Pulse (EQEP) modules
  • 2x 4-Ch Sigma-Delta Filter Modules (SDFM)
  • Additional Signal-multiplex Crossbars (XBAR)

Industrial Connectivity:

  • Programmable Real-Time Unit - Industrial Communication Subsystem (PRU-ICSS)
    • Dual core Programmable Real-Time Unit Subsystem (PRU0 / PRU1)
      • Deterministic Hardware
      • Dynamic Firmware
    • 20-channel enhanced input (eGPI) per PRU
    • 20-channel enhanced output (eGPO) per PRU
    • Embedded Peripherals and Memory
      • 1x UART, 1x ECAP, 1x MDIO, 1x IEP
      • 1x 32KB Shared General Purpose RAM
      • 2x 8KB Shared Data RAM
      • 1x 16KB IRAM per PRU
      • ScratchPad (SPAD), MAC/CRC
    • Digital encoder and sigma-delta control loops
    • The PRU-ICSS enables advanced industrial protocols including:
      • EtherCAT, Ethernet/IP™,
      • PROFINET, IO-Link for order
    • Dedicated Interrupt Controller (INTC)
    • Dynamic CONTROLSS XBAR Integration

High-Speed Interfaces:

  • Integrated 3-port Gigabit Ethernet switch (CPSW) supporting up to two external ports
    • MII (10/100), RMII (10/100), or RGMII (10/100/1000)
    • IEEE 1588 (2008 Annex D, Annex E, Annex F) with 802.1AS PTP
    • Clause 45 MDIO PHY management
    • 512x ALE engine-based Packet Classifiers
    • Priority flow control with up to 2KB packet size
    • Four CPU hardware interrupt pacing
    • IP/UDP/TCP checksum offload in hardware

Security:

  • Hardware Security Module (HSM) with support for Auto SHE 1.1/EVITA Full HSM
    • Arm Cortex-M4F based dedicated security controller
    • Isolated and secured RAMs
    • Peripherals like Timers, WWDT, RTC, Interrupt Controller
    • Safety related peripherals like CRC, ESM, PBIST
  • Secure boot support
    • Device Take Over Protection
    • Hardware-enforced root-of-trust (RoT)
      • Support for two sets of RoT keys
    • Authenticated boot support
      • Encrypted boot support
    • SW Anti-rollback protection
  • Debug security
    • Secure device debug only after cryptographic authentication
    • Support for permanent debug/JTAG disable
  • Device ID and Key Management
    • Unique ID (SoC ID)
    • Support for OTP Memory (FUSEROM)
  • Extensive Firewall Support
    • System Memory Protection Units (MPU) present at various interfaces
  • Cryptographic Acceleration
    • Cryptographic cores with DMA Support
    • AES - 128/192/256-bit key sizes
    • SHA2 - 256/384/512-bit support
    • Deterministic random bit generator (DRBG) with pseudo and true random number generator (TRNG)
    • Public Key Accelerator (PKA) to assist in RSA/Elliptic Curve Cryptography (ECC) processing

Functional Safety:

  • Enables design of systems with functional safety requirements
    • Error Signaling Module (ESM) with designated SAFETY_ERRORn pin
    • ECC or parity on calculation-critical memories
    • 4x Dual Clock Comparators (DCC)
    • 3x Self-Test Controller (STC)
    • Programmable Built-In Self-Test (PBIST) and fault-injection for CPU and on-chip RAM
    • Runtime internal diagnostic modules including voltage, temperature, and clock monitoring, windowed watchdog timers, CRC engines for memory integrity checks
  • Functional Safety-Compliant targeted [Industrial]
    • Developed for functional safety applications
    • Documentation to be made available to aid IEC 61508 functional safety system design
    • Systematic capability up to SIL-3 targeted
    • Hardware integrity up to SIL-3 targeted
    • Safety-related certification
      • IEC 61508 planned
  • Functional Safety-Compliant targeted [Automotive]
    • Developed for functional safety applications
    • Documentation to be made available to aid ISO 26262 functional safety system design
    • Systematic capability up to ASIL-D targeted
    • Hardware integrity up to ASIL-D targeted
    • Safety-related certification
      • ISO 26262 planned

Data Storage

  • 1x 4-bit Multi-Media Card/Secure Digital (MMC/SD) interface

Power Management

  • Recommended TPS653860-Q1 Power Management ICs (PMIC)
    • Companion PMIC specially designed to meet device power supply requirements
    • Flexible mapping and factory programmed configurations to support different use cases

Technology / Package:

  • AEC-Q100 qualified for automotive applications
  • 45nm technology
  • ZCZ Package
    • AM263x Compatible (ZCZ-C )
      • Pin-to-Pin compatible option with AM263x
    • AM263Px Resolver (ZCZ-S)
      • Adds new Resolver Subsystem functionality
    • AM263Px Resolver with Flash-in-Package (ZCZ-F)
      • Includes 1x internally connected Silicon in Package (SIP) 64Mb (8MB) ISSI IS25LX064-JWLA3 OSPI Flash device; up to 133MHz SDR and DDR
    • 324-pin NFBGA
    • 15.0mm x 15.0mm
    • 0.8mm pitch

Processor Cores:

  • Single, dual, and quad-core Arm Cortex-R5F MCU with each core running up to 400MHz
    • 16KB I-cache with 64-bit ECC per CPU core
    • 16KB D-cache with 32-bit ECC per CPU core
    • x256 integrated VIM per CPU Core
    • 256KB Tightly-Coupled Memory (TCM) with 32-bit ECC per CPU core cluster
    • Lockstep or Dual-core capable clusters
  • Trigonometric Math Unit (TMU) for accelerating trigonometric functions
    • Up to 4x, one per R5F MCU core

Memory:

  • 1x Flash Subsystem with OptiFlash memory technology and eXecute In Place (XIP) support
    • 1x Octal Serial Peripheral Interface (OSPI), up to 133MHz SDR and DDR
    • AM263P Flash-in-Package (ZCZ_F) variant includes 8MB OSPI Flash
  • 3MB of On-Chip RAM (OCSRAM)
    • 6 Banks x 512KB
    • ECC error protection
    • Internal DMA engine support
    • Remote L2 Cache for external memory, software programmable up to 128KB per CPU core

System on Chip (SoC) Services and Architecture:

  • 1x EDMA to support data movement functions
    • 2x Transfer Controllers (TPTC)
    • 1x Channel Controller (TPCC)
  • Device Boot supported from the following interfaces:
    • UART (Primary/Backup)
    • QSPI NOR Flash (4S/1S) (Primary)
    • OSPI NOR Flash (8S 50MHz SDR Mode0, 8S 25MHz DDR XSPI) (Primary)
  • Interprocessor communication modules
    • SPINLOCK module for synchronizing processes running on multiple cores
    • MAILBOX functionality implemented through CTRLMMR registers
  • Central Platform Time Sync (CPTS) support with time-sync and compare-event interrupt routers
  • Timer Modules:
    • 4x Windowed Watchdog Timer (WWDT)
    • 8x Real Time Interrupt (RTI) timer

General Connectivity:

  • 6x Universal Asynchronous RX-TX (UART)
  • 8x Serial Peripheral Interface (SPI) controllers
  • 5x Local Interconnect Network (LIN) ports
  • 4x Inter-Integrated Circuit (I2C) ports
  • 8x Modular Controller Area Network (MCAN) modules with CAN-FD support
  • 4x Fast Serial Interface Transmitters (FSITX)
  • 4x Fast Serial Interface Receivers (FSIRX)
  • Up to 139 General-Purpose I/O (GPIO) pins

Sensing & Actuation:

  • Real-time Control Subsystem (CONTROLSS)
  • Flexible Input/Output Crossbars (XBAR)
  • 5x 12-bit Analog-to-Digital Converters (ADC)
    • 6-input SAR ADC up to 4MSPS
      • 6x Single-ended channels OR
      • 3x Differential channels
    • Highly Configurable ADC Digital Logic
      • XBAR Start of Conversion Triggers (SOC)
      • User-defined Sample and Hold (S+H)
      • Flexible Post-processing Blocks (PPB)
  • 1x Resolver subsystem (ZCZ-S and ZCZ-F packages) with:
    • 2x Resolver to Digital Converter (RDC) OR
    • 2x 12-bit ADCs can also be used for general purpose
      • 4-input SAR ADC up to 3MSPS
        • 4x Single-ended channels OR
        • 2x Differential channels
  • 10x Analog Comparators with Type-A programmable DAC reference (CMPSSA)
  • 10x Analog Comparators with Type-B programmable DAC reference (CMPSSB)
  • 1x 12-bit Digital-to-Analog Converter (DAC)
  • 32x Pulse Width Modulation (EPWM) modules
    • Single or Dual PWM channels
    • Advanced PWM Configurations
    • Extended HRPWM time resolution
  • 16x Enhanced Capture (ECAP) modules
  • 3x Enhanced Quadrature Encoder Pulse (EQEP) modules
  • 2x 4-Ch Sigma-Delta Filter Modules (SDFM)
  • Additional Signal-multiplex Crossbars (XBAR)

Industrial Connectivity:

  • Programmable Real-Time Unit - Industrial Communication Subsystem (PRU-ICSS)
    • Dual core Programmable Real-Time Unit Subsystem (PRU0 / PRU1)
      • Deterministic Hardware
      • Dynamic Firmware
    • 20-channel enhanced input (eGPI) per PRU
    • 20-channel enhanced output (eGPO) per PRU
    • Embedded Peripherals and Memory
      • 1x UART, 1x ECAP, 1x MDIO, 1x IEP
      • 1x 32KB Shared General Purpose RAM
      • 2x 8KB Shared Data RAM
      • 1x 16KB IRAM per PRU
      • ScratchPad (SPAD), MAC/CRC
    • Digital encoder and sigma-delta control loops
    • The PRU-ICSS enables advanced industrial protocols including:
      • EtherCAT, Ethernet/IP™,
      • PROFINET, IO-Link for order
    • Dedicated Interrupt Controller (INTC)
    • Dynamic CONTROLSS XBAR Integration

High-Speed Interfaces:

  • Integrated 3-port Gigabit Ethernet switch (CPSW) supporting up to two external ports
    • MII (10/100), RMII (10/100), or RGMII (10/100/1000)
    • IEEE 1588 (2008 Annex D, Annex E, Annex F) with 802.1AS PTP
    • Clause 45 MDIO PHY management
    • 512x ALE engine-based Packet Classifiers
    • Priority flow control with up to 2KB packet size
    • Four CPU hardware interrupt pacing
    • IP/UDP/TCP checksum offload in hardware

Security:

  • Hardware Security Module (HSM) with support for Auto SHE 1.1/EVITA Full HSM
    • Arm Cortex-M4F based dedicated security controller
    • Isolated and secured RAMs
    • Peripherals like Timers, WWDT, RTC, Interrupt Controller
    • Safety related peripherals like CRC, ESM, PBIST
  • Secure boot support
    • Device Take Over Protection
    • Hardware-enforced root-of-trust (RoT)
      • Support for two sets of RoT keys
    • Authenticated boot support
      • Encrypted boot support
    • SW Anti-rollback protection
  • Debug security
    • Secure device debug only after cryptographic authentication
    • Support for permanent debug/JTAG disable
  • Device ID and Key Management
    • Unique ID (SoC ID)
    • Support for OTP Memory (FUSEROM)
  • Extensive Firewall Support
    • System Memory Protection Units (MPU) present at various interfaces
  • Cryptographic Acceleration
    • Cryptographic cores with DMA Support
    • AES - 128/192/256-bit key sizes
    • SHA2 - 256/384/512-bit support
    • Deterministic random bit generator (DRBG) with pseudo and true random number generator (TRNG)
    • Public Key Accelerator (PKA) to assist in RSA/Elliptic Curve Cryptography (ECC) processing

Functional Safety:

  • Enables design of systems with functional safety requirements
    • Error Signaling Module (ESM) with designated SAFETY_ERRORn pin
    • ECC or parity on calculation-critical memories
    • 4x Dual Clock Comparators (DCC)
    • 3x Self-Test Controller (STC)
    • Programmable Built-In Self-Test (PBIST) and fault-injection for CPU and on-chip RAM
    • Runtime internal diagnostic modules including voltage, temperature, and clock monitoring, windowed watchdog timers, CRC engines for memory integrity checks
  • Functional Safety-Compliant targeted [Industrial]
    • Developed for functional safety applications
    • Documentation to be made available to aid IEC 61508 functional safety system design
    • Systematic capability up to SIL-3 targeted
    • Hardware integrity up to SIL-3 targeted
    • Safety-related certification
      • IEC 61508 planned
  • Functional Safety-Compliant targeted [Automotive]
    • Developed for functional safety applications
    • Documentation to be made available to aid ISO 26262 functional safety system design
    • Systematic capability up to ASIL-D targeted
    • Hardware integrity up to ASIL-D targeted
    • Safety-related certification
      • ISO 26262 planned

Data Storage

  • 1x 4-bit Multi-Media Card/Secure Digital (MMC/SD) interface

Power Management

  • Recommended TPS653860-Q1 Power Management ICs (PMIC)
    • Companion PMIC specially designed to meet device power supply requirements
    • Flexible mapping and factory programmed configurations to support different use cases

Technology / Package:

  • AEC-Q100 qualified for automotive applications
  • 45nm technology
  • ZCZ Package
    • AM263x Compatible (ZCZ-C )
      • Pin-to-Pin compatible option with AM263x
    • AM263Px Resolver (ZCZ-S)
      • Adds new Resolver Subsystem functionality
    • AM263Px Resolver with Flash-in-Package (ZCZ-F)
      • Includes 1x internally connected Silicon in Package (SIP) 64Mb (8MB) ISSI IS25LX064-JWLA3 OSPI Flash device; up to 133MHz SDR and DDR
    • 324-pin NFBGA
    • 15.0mm x 15.0mm
    • 0.8mm pitch

The AM263Px Sitara™ Arm® Microcontrollers are built to meet the complex real-time processing needs of next generation industrial and automotive embedded products. The AM263Px MCU family consists of multiple pin-to-pin compatible devices with up to four 400MHz Arm® Cortex®-R5F cores. As an option, the Arm® R5F subsystem can be programmed to run in lockstep or dual-core mode for multiple functional safety configurations. The industrial communications subsystem (PRU-ICSS) enables integrated industrial Ethernet communication protocols such as PROFINET®, Ethernet/IP®, EtherCAT® (among many others), standard Ethernet connectivity, and even custom I/O interfaces. The family is designed for the future of motor control and digital power applications with advanced analog sensing and digital actuation modules.

The multiple R5F cores are arranged in cluster subsystems with 256KB of shared tightly coupled memory (TCM) along with 3MB of shared SRAM, greatly reducing the need for external memory. Extensive ECC is included for on-chip memories, peripherals, and interconnects for enhanced reliability. Granular firewalls managed by the Hardware Security Manager (HSM) enable developers to implement stringent security-minded system design requirements. Cryptographic acceleration and secure boot are also available on AM263Px devices.

TI provides a complete set of microcontroller software and development tools for the AM263Px family of microcontrollers.

The AM263Px Sitara™ Arm® Microcontrollers are built to meet the complex real-time processing needs of next generation industrial and automotive embedded products. The AM263Px MCU family consists of multiple pin-to-pin compatible devices with up to four 400MHz Arm® Cortex®-R5F cores. As an option, the Arm® R5F subsystem can be programmed to run in lockstep or dual-core mode for multiple functional safety configurations. The industrial communications subsystem (PRU-ICSS) enables integrated industrial Ethernet communication protocols such as PROFINET®, Ethernet/IP®, EtherCAT® (among many others), standard Ethernet connectivity, and even custom I/O interfaces. The family is designed for the future of motor control and digital power applications with advanced analog sensing and digital actuation modules.

The multiple R5F cores are arranged in cluster subsystems with 256KB of shared tightly coupled memory (TCM) along with 3MB of shared SRAM, greatly reducing the need for external memory. Extensive ECC is included for on-chip memories, peripherals, and interconnects for enhanced reliability. Granular firewalls managed by the Hardware Security Manager (HSM) enable developers to implement stringent security-minded system design requirements. Cryptographic acceleration and secure boot are also available on AM263Px devices.

TI provides a complete set of microcontroller software and development tools for the AM263Px family of microcontrollers.

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技术文档

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顶层文档 类型 标题 格式选项 下载最新的英语版本 日期
* 用户指南 AM263Px Sitara Microcontrollers Technical Reference Manual (Rev. D) PDF | HTML 2025-7-29
* 用户指南 AM263Px Sitara Microcontrollers Register Addendum (Rev. B) 2025-6-2
用户指南 TI CPSW3G Debug Guide PDF | HTML 2026-9-28
应用手册 为机器人设计具有确定性的可扩展以太网主干网 PDF | HTML PDF | HTML 2026-7-9
功能安全信息 AM261x, AM263x, and AM263Px Software Diagnostics Library TUV SUD Functional Safety Certificate (Rev. B) 2026-4-1
应用手册 AM26 Ethercat SubDevice with TwinCat PDF | HTML 2025-12-10
白皮书 集成 EVCC、DCDC 和主机子系统： 适用于新一代 EV 充电的 TI 汽车 MCU (Rev. A) PDF | HTML 英语版 (Rev.A) PDF | HTML 2025-11-26
应用手册 AM26x 定制 PCB 系统入门指南 (Rev. A) PDF | HTML 英语版 (Rev.A) PDF | HTML 2025-6-18
功能安全信息 AM263Px TÜV SÜD Functional Safety Certificate 2025-5-27
功能安全信息 AM263Px TÜV SÜD Functional Safety Certificate Report 2025-5-27
用户指南 AM26x 硬件设计指南 (Rev. D) PDF | HTML 英语版 (Rev.D) PDF | HTML 2025-5-19
用户指南 AM263Px MCAL user guide 2025-4-28
白皮书 Industrial Communications on AM26x Family. PDF | HTML 英语版 PDF | HTML 2025-4-14
应用手册 Jacinto™ 和 Sitara™ 嵌入式处理器上的微控制器抽象层 PDF | HTML 英语版 PDF | HTML 2025-3-6
应用手册 AM26x 系列迁移概述 (Rev. A) PDF | HTML 英语版 (Rev.A) PDF | HTML 2024-12-11
应用简报 在 AM26x 器件上实现更快的安全启动 PDF | HTML 英语版 PDF | HTML 2024-11-14
用户指南 AM263P OSPI、QSPI 闪存选择指南 PDF | HTML 英语版 PDF | HTML 2024-4-29
应用手册 隔离式调制器与 MCU 之间的数字接口的时钟边沿延迟补偿 (Rev. A) PDF | HTML 英语版 (Rev.A) PDF | HTML 2024-1-19
应用手册 OptiFlash 存储器技术 (Rev. A) PDF | HTML 英语版 (Rev.A) PDF | HTML 2023-12-5
产品概述 AM2x 和 Hercules™ 微控制器的功能安全 PDF | HTML 英语版 PDF | HTML 2023-11-9
白皮书 面向工业自动化的时间敏感型网络 (Rev. C) PDF | HTML 英语版 (Rev.C) PDF | HTML 2023-8-15
应用手册 在 SITARA MCU 器件上集成 MbedTLS PDF | HTML 英语版 PDF | HTML 2023-8-3
应用手册 使用 8b-10b 线路编码和可编程实时单元的驱动器内通信 PDF | HTML 英语版 PDF | HTML 2023-6-29
证书 BP-AM2BLDCSERVO EU Declaration of Conformity (DoC) 2023-6-28

设计与开发

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评估板

TMDSHSECDOCK-AM263 — AM263x-CC 用于 GPMC、JTAG/跟踪、MCAN 和 LIN 信号的 HSEC 集线站和分线板。

此评估模块是用于 TMDSCNCD263 (AM263x controlCARD) 和 TMDSCNCD263P (AM263Px controlCARD) 的高速边缘卡 (HSEC) 扩展坞，可扩展关键 I/O 和硬件外设。在评估和开发阶段，该电路板为客户展示了 AM263x 和 AM263Px 上 MCU+ SDK 的特性。除了 TMDSHSECDOCK 的特性外，该电路板还为 CAN/LIN、GPMC（仅限 AM263x）、TRACE 和 JTAG 等其他 AM263x 和 AM263Px 系列特性提供硬件支持。TMDSHSECDOCK-AM263 包含一个板载 64Mb PSRAM (...)
支持的产品和硬件
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无货
调试探针

LB-3P-TRACE32-ARM — 适用于基于 Arm® 的微控制器和处理器的 Lauterbach TRACE32® 调试和跟踪系统

Lauterbach TRACE32® 工具是一套先进的硬件和软件组件，开发人员可通过它分析、优化和认证各种基于 Arm® 的微控制器和处理器。这套全球知名的嵌入式系统和 SoC 调试和跟踪解决方案是所有开发阶段（从器件前开发一直到产品认证和现场故障排查）的理想解决方案。Lauterbach 工具直观的模块化设计可为工程师提供当今最高的可用性能，并提供可随需求变化而调整和扩展的系统。借助 TRACE32® 调试器，开发人员还可以通过单个调试接口同时调试和控制 SoC 中的任何 C28x/C29x C6x/C7x DSP 内核以及所有其他 Arm 内核，这是业界的一项独特功能。

来源：Lauterbach GmbH
支持的产品和硬件
调试探针

TSK-3P-BLUEBOX — TASKING BlueBox hardware debugger

TASKING’s Debug, Trace, and Test tools offer comprehensive solutions for efficient debugging, tracing, and testing of TI's embedded systems. The scalable TASKING BlueBox debuggers allow users to easily flash, debug, and test across TI's portfolio. Development on TI hardware is made even easier with (...)

来源：TASKING Germany GmbH
支持的产品和硬件
软件开发套件 (SDK)

AM263PX-MCAL-SDK — Microcontroller Abstraction Layer (MCAL) and Complex Device Drivers (CDD) for AM263PX

AM263Px 微控制器 (MCU) 和软件开发套件 (SDK) 共同构成一个面向嵌入式处理器的统一软件平台，此平台设置简单，可快速提供开箱即用的示例、基准测试和演示。此软件无需从头开始创建基本系统软件功能，可加快应用程序开发进程。

 

该 SDK 支持 R5F 和M4 内核、示例、驱动程序和引导加载程序。此 SDK 包含的具体内容取决于器件功能，但所有器件共用一套通用的应用程序编程接口 (API)，并基于经过验证的现有软件组件进行构建，可确保可靠性和质量。这些软件组件经过全面测试，可确保与 Code Composer Studio™ 集成式开发环境 (CCSTUDIO) 协同工作。

 

(...)

支持的产品和硬件
软件开发套件 (SDK)

AM263PX-RESTRICTED-SECURITY — AM263Px restricted security content

AM263Px 微控制器 (MCU) 和软件开发套件 (SDK) 共同构成一个面向嵌入式处理器的统一软件平台，此平台设置简单，可快速提供开箱即用的示例、基准测试和演示。此软件无需从头开始创建基本系统软件功能，可加快应用程序开发进程。

 

该 SDK 支持 R5F 和M4 内核、示例、驱动程序和引导加载程序。此 SDK 包含的具体内容取决于器件功能，但所有器件共用一套通用的应用程序编程接口 (API)，并基于经过验证的现有软件组件进行构建，可确保可靠性和质量。这些软件组件经过全面测试，可确保与 Code Composer Studio™ 集成式开发环境 (CCSTUDIO) 协同工作。

 

(...)

支持的产品和硬件
软件开发套件 (SDK)

INDUSTRIAL-COMMUNICATIONS-SDK-AM263PX — Industrial Communications SDK for AM263Px

该软件开发套件 (SDK) 包括在 TI 处理器上运行的实时工业通信协议（EtherCAT、EtherNet/IP、PROFINET、IO-Link 等）。此外，还具有 PRU-ICSS 固件、驱动程序、通信协议栈库和应用示例以及文档。

最新动态：

  • 基于 EtherCAT 的以太网 (EoE)
  • 基于 EtherCAT 的文件访问 (FoE)
  • 集成 NVM 库以实现持久数据存储 - EtherCAT 示例现在使用 EEPROM 而不是闪存来存储 EtherCAT EEPROM 数据
  • EtherNet/IP - 对象字典大小应该可以在不重建协议栈的情况下进行更改
  • IOLINK 控制器 - 在示例应用中为 (...)
支持的产品和硬件
软件开发套件 (SDK)

MCU-PLUS-SDK-AM263PX — MCU+ SDK for AM263Px - RTOS, No-RTOS

AM263Px 微控制器 (MCU) 和软件开发套件 (SDK) 共同构成一个面向嵌入式处理器的统一软件平台，此平台设置简单，可快速提供开箱即用的示例、基准测试和演示。此软件无需从头开始创建基本系统软件功能，可加快应用程序开发进程。

 

该 SDK 支持 R5F 和M4 内核、示例、驱动程序和引导加载程序。此 SDK 包含的具体内容取决于器件功能，但所有器件共用一套通用的应用程序编程接口 (API)，并基于经过验证的现有软件组件进行构建，可确保可靠性和质量。这些软件组件经过全面测试，可确保与 Code Composer Studio™ 集成式开发环境 (CCSTUDIO) 协同工作。

 

(...)

支持的产品和硬件
软件开发套件 (SDK)

MOTOR-CONTROL-SDK-AM263PX — Motor control SDK for AM263Px

AM263Px 微控制器 (MCU) 和软件开发套件 (SDK) 共同构成一个面向嵌入式处理器的统一软件平台，此平台设置简单，可快速提供开箱即用的示例、基准测试和演示。此软件无需从头开始创建基本系统软件功能，可加快应用程序开发进程。

 

该 SDK 支持 R5F 和M4 内核、示例、驱动程序和引导加载程序。此 SDK 包含的具体内容取决于器件功能，但所有器件共用一套通用的应用程序编程接口 (API)，并基于经过验证的现有软件组件进行构建，可确保可靠性和质量。这些软件组件经过全面测试，可确保与 Code Composer Studio™ 集成式开发环境 (CCSTUDIO) 协同工作。

 

(...)

支持的产品和硬件
软件开发套件 (SDK)

IBV-3P-ICECAT — 用于嵌入式系统的 IBV EtherCAT 主器件 SDK

The icECAT EtherCAT Master Stack library by IBV is a Software Development Kit (SDK) for creating an EtherCAT MainDevice (master) system achieving best performance with lowest resource usage. It is especially designed for use on embedded systems with optimized Link Layer drivers with DMA support (...)

来源：IBV - Echtzeit- und Embedded GmbH & Co. KG
支持的产品和硬件
IDE、配置、编译器或调试器

CCSTUDIO — Code Composer Studio™ integrated development environment (IDE)

CCStudio™ 集成开发环境 (IDE) 是 TI 庞大的 CCStudio™ 开发生态系统的一部分，是面向 TI 微控制器、处理器、无线连接器件和雷达传感器的集成开发环境。CCStudio IDE 可作为桌面或基于云的应用提供。云版本无需下载大型软件。此外，由于该工具基于 Eclipse Theia 框架构建，因此该界面对 VS Code®用户来说非常熟悉。如果选择在本机使用 VS Code，可以从市场上获取适用于所选器件的 TI VS Code 扩展包。

AI 驱动的开发
CCStudio IDE 集成了行业标准 AI (...)

支持的产品和硬件
IDE、配置、编译器或调试器

EDGE-AI-STUDIO-MCU — Edge AI Studio for Microcontrollers

Edge AI Studio 是旨在加速 TI 处理器、微控制器和雷达传感器上边缘 AI 开发的一系列图形和命令行工具。无论是使用 TI Model Zoo 中的模型开发概念验证，
还是利用您自己的模型，Edge AI Studio 都能提供所需的工具。

Edge AI Studio 图形用户界面提供了完整的集成解决方案，用于数据收集和标注、模型训练和编译，以便在实时开发平台上部署。从 TI Model Zoo 中的各种预训练模型中进行选择，并可选择使用自定义数据重新训练，以提高准确性和性能。Edge AI Studio (...)

支持的产品和硬件
IDE、配置、编译器或调试器

SYSCONFIG — Standalone desktop version of SysConfig

CCStudio™ SysConfig is part of TI's extensive CCStudio™ development ecosystem and is a configuration tool that simplifies hardware and software configuration challenges to accelerate software development.

SysConfig provides an intuitive graphical user interface for configuring pins, peripherals, (...)

支持的产品和硬件
IDE、配置、编译器或调试器

TSK-3P-VX-TOOLSET — 用于 Arm 的 TASKING VX-toolset

VX-toolset 是专为特定 Cortex-M 和 Cortex-R 核心器件设计的经认证编译器工具链，适用于安全关键型嵌入式软件开发。借助 Eclipse IDE 集成、高级多核支持和 TASKING BlueBox 调试程序兼容性，VX-toolset 简化了开发。已通过 TÜV NORD 认证，符合 ISO 26262 至 ASIL D 级以及 ISO 21434 标准。

来源：TASKING Germany GmbH
支持的产品和硬件
线上培训

AM26X-ACADEMY — AM26x academy

AM26x Academy features easy-to-use training modules ranging from the basics of getting started to advanced development topics.
支持的产品和硬件
入门

TI-DEVELOPER-ZONE — Start embedded development on your desktop or in the cloud

From evaluation to deployment the TI Developer Zone provides a comprehensive range of software, tools and training to ensure that you have everything you need for each stage of the development process.
支持的产品和硬件
应用软件和框架

AM263PX-RESTRICTED-SAFETY — AM263Px restricted functional safety content

AM263Px restricted functional safety content
支持的产品和硬件
固件

USIT-3P-SECIC-HSM — Uni-Sentry SecIC-HSM 固件

SecIC-HSM 旨在满足 MCU/SoC 芯片所需的网络安全要求。HSM 固件可应用于汽车、新能源、光伏、机器人、医疗保健和航空等领域。提供的网络安全功能包括安全启动、安全通信 (SecOC)、安全诊断、安全存储、安全更新、安全调试和密钥管理。SecIC-HSM 的优点：一站式网络安全解决方案，兼容多个芯片系列，具备行业领先的性能，已在近 30 家 OEM 的量产车型中成功部署，累计部署量超过 300 万台。

来源：Shanghai Uni-Sentry Intelligent Technology Co., LTD
支持的产品和硬件
固件

USIT-3P-SECIC-PQC — Uni-Sentry SecIC-PQC 算法固件

Uni-Sentry 的安全解决方案采用 PQC 算法，能够抵御量子计算机对传统加密算法构成的解密威胁。PQC 固件与硬件安全模块 (HSM) 进行了协同优化，利用硬件加速和安全增强功能来提高加密算法执行效率和安全性。 


Uni-Sentry 可持续监控全球量子计算的发展情并更新其算法组合。当前的 PQC 产品功能包括：

  • SP 800-208：LMS 和 XMSS
  • FIPS 203 (ML-KEM)： CRYSTALS-KYBER 
  • FIPS 204 (ML-DSA)： CRYSTALS-Dilithium 
  • FIPS 205 (SLH-DSA)：SPHINCS+ 

技术亮点 

  • (...)
来源：Shanghai Uni-Sentry Intelligent Technology Co., LTD
支持的产品和硬件
软件编程工具

UNIFLASH — UniFlash for most TI microcontrollers (MCUs) and mmWave sensors

UniFlash 是 TI 庞大的 CCStudio™ 开发生态系统的成员并且是一款软件工具，用于对 TI 微控制器和无线连接器件上的片上闪存以及 TI 处理器的板载闪存进行编程。UniFlash 提供图形界面和命令行界面，可在桌面上或云中运行。

可以在 CCStudio™ 开发人员专区从云中运行 UniFlash，也可以将其下载并在 Windows®、Linux® 和 macOS® 计算机上使用。

请注意，毫米波、AMx、K2G 和 J7 器件不支持 macOS。AMx、K2G 和 J7 器件仅在命令行上受支持。

支持的产品和硬件
支持软件

ICOMMS-SWS — CouthIT 工业通信软件工程服务

CouthIT 的 Embedded Software Group 专门开发用于 TI Sitara 和 Jacinto 微处理器和微控制器的高性能工业通信软件。

 

凭借硬件加速的 TI 工业通信子系统 (TI ICSS) 和 TI 通用平台以太网交换机 (TI CPSW)，CouthIT 提供了领先工业通信协议的优化、可立即用于生产环境的实现方案。

 

该公司还提供定制和集成服务，以满足独特的应用要求，帮助客户加快产品开发，同时确保强大可靠的通信性能。

支持的产品和硬件
支持软件

MCTRL-SWS — CouthIT 电机控制软件工程服务

CouthIT 的嵌入式软件团队专门开发用于 TI Sitara 和 Jacinto 微处理器和微控制器的电机控制固件和软件。凭借在实时电机控制系统方面的深厚专业知识，该团队开发了可直接投入生产的高性能解决方案，这些解决方案采用硬件加速的 TI 工业通信子系统 (TI ICSS) 或本机微控制器接口，集成了领先的电机控制通信协议。

CouthIT 还提供根据特定应用要求量身打造的定制、集成和优化服务，使客户能够加快产品开发，同时确保稳健、可靠和可扩展的电机控制解决方案。

支持的产品和硬件
支持软件

MATHW-3P-AM26X-EC — 德州仪器 (TI) AM26x MCU 嵌入式编码器支持包

德州仪器 (TI) 为各种 AM26x 器件和评估板提供基于模型的设计工作流程。

借助适用于 AM26x controlCARD 和 LaunchPad 板的 Embedded Coder® 支持包，您可以使用 Simulink® 模型在 AM26x 器件上自动构建、加载和运行算法。  无需使用手动编程，即可在 Simulink 中设计模型、使用 Embedded Coder 生成代码，以及在专为实时控制应用设计的 AM263x、AM263Px、AM261x 硬件平台上运行可执行文件。运用业界成熟的基于模型的设计技术来验证算法是否在仿真期间工作，然后使用自动代码生成将算法作为独立应用实施在 (...)

来源：MathWorks, Inc.
支持的产品和硬件
仿真模型

AM263Px BSDL Model (Rev. A)

SPRM835A.ZIP (10 KB) - BSDL 模型
支持的产品和硬件
仿真模型

AM263Px IBIS Model

SPRM834.ZIP (4124 KB) - IBIS 模型
支持的产品和硬件
仿真模型

AM263Px Thermal Model

SPRM833.ZIP (6 KB) - 热模型
支持的产品和硬件
计算工具

AM263PX-PWR-EST-CALC — AM263Px power-estimation tool

The power estimation spreadsheet provides power consumption estimates based on measured and simulated data; they are provided “as is” and are not ensured within a specified precision.
支持的产品和硬件
封装 引脚 CAD 符号、封装和 3D 模型
NFBGA (ZCZ) 324 Ultra Librarian
适用于评估类项目的 TI 标准条款与条件。

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