SoC processor w/ 2x 1000 MHz C66x DSP and 2 dual Arm Cortex-M4 for audio amplifier

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产品详细信息

参数

DSP 2 C66x DSP MHz (Max) 1000 DRAM DDR2-800, DDR3-1066, DDR3L-1066 Co-processor(s) 2 Dual ARM Cortex-M4 Hardware accelerators 1 Audio Tracking Logic EMIF 1 32-bit Other on-chip memory 512 KB Ethernet MAC 1000, 2-port 1Gb switch Parallel video input ports 4 Display 1 LCD OUT, 1 SD-DAC Serial I/O CAN, CAN-FD, I2C, QSPI, SPI, UART Storage interface 1x SDIO 4b McASP 3 TI functional safety category Functional Safety-Compliant open-in-new 查找其它 DRAx 数字驾驶舱 SoCs

特性

  • Architecture designed for infotainment applications
  • Up to 2 C66x floating-point VLIW DSP
    • Fully object-code compatible with C67x and C64x+
    • Up to thirty-two 16 × 16-bit fixed-point multiplies per cycle
  • Up to 512kB of on-chip L3 RAM
  • Level 3 (L3) and Level 4 (L4) interconnects
  • Memory Interface (EMIF) module
    • Supports DDR3/DDR3L up to DDR-1066
    • Supports DDR2 up to DDR-800
    • Up to 2GB supported
  • Dual Arm® Cortex®-M4 (IPU)
  • Vision accelerationPac
    • Embedded Vision Engine (EVE)
  • Display subsystem
    • Display controller with DMA engine
    • CVIDEO / SD-DAC TV analog composite output
  • On-chip temperature sensor that is capable of generating temperature alerts
  • General-Purpose Memory Controller (GPMC)
  • Enhanced Direct Memory Access (EDMA) controller
  • 3-port (2 external) Gigabit Ethernet (GMAC) switch
  • Controller Area Network (DCAN) module
    • CAN 2.0B protocol
  • Modular Controller Area Network (MCAN) module
    • CAN 2.0B protocol
  • Eight 32-bit general-purpose timers
  • Three configurable UART modules
  • Four Multichannel Serial Peripheral Interfaces (McSPI)
  • Quad SPI interface
  • Two Inter-Integrated Circuit (I2C™) ports
  • Three Multichannel Audio Serial Port (McASP) modules
  • Secure Digital Input Output Interface (SDIO)
  • Up to 126 General-Purpose I/O (GPIO) pins
  • Power, reset, and clock management
  • On-chip debug with CTools technology
  • Automotive AEC-Q100 qualified
  • 15 × 15 mm, 0.65-mm pitch, 367-pin PBGA (ABF)
  • Five instances of Real-Time Interrupt (RTI) modules that can be used as watch dog timers
  • 8-channel 10-bit ADC
  • PWMSS
  • Video and image processing support
    • Full-HD video (1920 × 1080p, 60 fps)
    • Video input and video output
    • GPIOs when not used for video
  • Video Input Port (VIP) module
    • Support for up to 4 multiplexed input ports

All trademarks are the property of their respective owners.

open-in-new 查找其它 DRAx 数字驾驶舱 SoCs

描述

The DRA78x processor is offered in a 367-ball, 15×15-mm, 0.65-mm ball pitch (0.8 mm spacing rules can be used on signals) with Via Channel™ Array (VCA) technology, ball grid array (FCBGA) package.

The architecture is designed to deliver high-performance concurrencies for automotive co-processor, hybrid radio and amplifier applications in a cost-effective solution, providing full scalability from the DRA75x ("Jacinto 6 EP" and "Jacinto 6 Ex"), DRA74x "Jacinto 6", DRA72x "Jacinto 6 Eco", and DRA71x "Jacinto 6 Entry" family of infotainment processors.

Additionally, Texas Instruments (TI) provides a complete set of development tools for the Arm, and DSP, including C compilers and a debugging interface for visibility into source code execution.

The DRA78x Jacinto 6 RSP (Radio Sound Processor) device family is qualified according to the AEC-Q100 standard.

The device features a simplified power supply rail mapping which enables lower cost PMIC solutions.

The DRA78x processor is offered in a 367-ball, 15×15-mm, 0.65-mm ball pitch (0.8mm spacing rules can be used on signals) with Via Channel™ Array (VCA) technology, ball grid array (FCBGA) package.

The architecture is designed to deliver high-performance concurrencies for automotive co-processor, hybrid radio and amplifier applications in a cost-effective solution, providing full scalability from the DRA75x ("Jacinto 6 EP" and "Jacinto 6 Ex"), DRA74x "Jacinto 6", DRA72x "Jacinto 6 Eco", and DRA71x "Jacinto 6 Entry" family of infotainment processors.

Additionally, Texas Instruments (TI) provides a complete set of development tools for the Arm, and DSP, including C compilers and a debugging interface for visibility into source code execution.

The DRA78x Jacinto 6 RSP (Radio Sound Processor) device family is qualified according to the AEC-Q100 standard.

The device features a simplified power supply rail mapping which enables lower cost PMIC solutions.

open-in-new 查找其它 DRAx 数字驾驶舱 SoCs
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技术文档

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设计与开发

有关其他条款或所需资源,请点击下面的任何链接来查看详情页面。

硬件开发

评估板 下载
document-generic 用户指南
$1,580.77
说明

Jacinto™ DRA78x 评估模块 (EVM) 是一款评估平台,旨在加速无线电信号处理器 (RSP) 应用的开发工作和上市进程。该 EVM 基于采用异构可扩展架构的 Jacinto DRA78x SoC 而构建,该架构包含以下组合:

  • TI 的定点和浮点 TMS320C66x 数字信号处理器 (DSP)
  • 带嵌入式视觉引擎 (EVE) 的 Vision AccelerationPac
  • 双核 ARM® Cortex®-M4 处理器

此 EVM 还集成了众多外设,包括多摄像头接口(并行和串行)显示屏、CAN 和千兆位以太网 AVB。此外,此 EVM 还集成了以太网、FPD-Link 和 HDMI 等关键外设。

请注意,DRA78x 评估模块不包括电源,需要单独购买。需要符合以下规格的电源:

  • 12V 直流输出
  • 5A 输出
  • 正极内端子和负极外端子
  • 2.5mm (...)
特性
  • 硬件
    • DRA78x 处理器
    • 512MB DDR3L
    • LP8733/LP8732 电源管理集成电路
    • 四通道 SPI:1Gbit
    • NOR:512Mbit
  • 软件
    • Linux
    • Android
    • StarterWare
  • 连接
    • 千兆位以太网
    • Micro SD 卡
    • HDMI
    • FPD-Link III、串行器和解串器
    • CAN 接口,2 线制 PHY
    • CAN-FD 接口,2 线制 PHY

软件开发

软件开发套件 (SDK) 下载
适用于 DRA7x Jacinto 处理器的处理器软件开发套件 – Linux、Android 和 RTOS
PROCESSOR-SDK-DRA7X Processor SDK Linux Automotive

Processor SDK Linux Automotive 是用于 TI Jacinto™ DRAx 系列信息娱乐系统 SoC (...)

特性
Processor SDK Linux Automotive 功能
  • 开放的 Linux 支持
  • Linux 内核和引导加载程序
  • 文件系统
  • Qt/Webkit 应用程序框架
  • 3D 图形支持
  • 2D 图形支持
  • 集成式 WLAN 和蓝牙支持
  • 基于 GUI 的应用程序启动器
  • 示例应用,包括:
    • ARM 基准测试:Dhrystone、Linpack、Whetstone
    • Webkit Web 浏览器
    • 软 Wifi 接入点
    • 加密:AES、3DES、MD5、SHA
    • 多媒体:GStreamer/FFMPEG
    • 可编程实时单元 (PRU)
  • 主机工具,包括闪存工具和引脚复用实用程序
  • 用于 Linux 开发的 Code Composer Studio™ IDE
  • 文档
Processor SDK Android Automotive 功能
  • Android 支持
  • Linux 内核和引导加载程序
  • 文件系统
  • 3D 图形支持
  • 2D 图形支持
  • 集成式 WLAN 和蓝牙支持
  • 快速启动闪存支持
  • 在 HS 器件上提供 Android 验证启动支持
  • 通过 OpenMAX 插件为视频编解码器提供多媒体支持
  • 适用于 UI 和视频合成加速的 HWComposer
  • 通过 V4L2 (...)
调试探测 下载
XDS110 JTAG 调试探针
TMDSEMU110-U The Texas Instruments XDS110 is a new class of debug probe (emulator) for TI embedded processors. The XDS110 replaces the XDS100 family while supporting a wider variety of standards (IEEE1149.1, IEEE1149.7, SWD) in a single pod. Also, all XDS debug probes support Core and System Trace in all ARM and (...)
$99.00
特性

The XDS110 is the latest entry level debug probe (emulators) for TI embedded processors. Designed to be a complete solution that delivers JTAG and SWD connectivity at a low cost, the XDS110 is the debug probe of choice for entry-level debugging of TI microcontrollers, processors and SimpleLink (...)

设计工具和仿真

计算工具 下载
Clock Tree Tool for Sitara™ ARM® Processors
CLOCKTREETOOL The Clock Tree Tool (CTT) for Sitara™ ARM®, Automotive, and Digital Signal Processors is an interactive clock tree configuration software that provides information about the clocks and modules in these TI devices. It allows the user to:
  • Visualize the device clock tree
  • Interact with clock tree elements (...)
document-generic 用户指南

CAD/CAE 符号

封装 引脚 下载
FCBGA (ABF) 367 视图选项

订购与质量

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