Next generation SoC family for L2/L3, near-field analytic systems using deep learning technologies




Arm CPU 2 ARM Cortex-A72 Arm MHz (Max.) 1800 DSP 1 C7x, 2 C66x DSP MHz (Max) 1350, 1000 Graphics processing unit (GPU) 1 GE8430 2D/3D GPU frequency (Max) (MHz) 750 Hardware accelerators 1 Deep Learning accelerator, 1 Depth and Motion accelerator, 1 Video Encode/Decode accelerator, 1 Vision Processing accelerator Co-processor(s) MCU island: 2 ARM Cortex-R5F (lockstep opt), SoC main: 4 ARM Cortex-R5F (lockstep opt) Features MCU island: ASIL-D, SoC main: ASIL-B Security Cryptographic acceleration, Debug security, Device identity, Isolation firewalls, Secure boot & storage & programming, Software IP protection, Trusted execution environment Other on-chip memory 9.5 MB EMIF 1 32-bit DRAM LPDDR4-3733 Storage interface 1 2L UFS, 1 eMMC, 2 SDIO SPI 1 OSPI/HyperBus, 1 QSPI, 11 McSPI CSI-2 4L TX, 8L RX Display 2 DPI, 1 DSI, 1 EDP Ethernet MAC 8-port 2.5Gb switch PCIe 4 PCIe Gen3 Serial I/O I2C, I3C, UART, CAN-FD, USB Rating Automotive open-in-new 查找其它 TDAx ADAS SOC


FCBGA (ALF) 827 - open-in-new 查找其它 TDAx ADAS SOC


  • Processor cores:
  • C7x floating point, vector DSP, up to 1.0 GHz, 80 GFLOPS, 256 GOPS
  • Deep-learning matrix multiply accelerator (MMA), up to 8 TOPS (8b) at 1.0 GHz
  • Vision Processing Accelerators (VPAC) with Image Signal Processor (ISP) and multiple vision assist accelerators
  • Depth and Motion Processing Accelerators (DMPAC)
  • Dual 64-bit Arm® Cortex®-A72 microprocessor subsystem at up to 1.8 GHz, 22K DMIPS
    • 1MB shared L2 cache per dual-core Cortex®-A72 cluster
    • 32KB L1 DCache and 48KB L1 ICache per Cortex®-A72 core
  • Six Arm® Cortex®-R5F MCUs at up to 1.0 GHz, 12K DMIPS
    • 64K L2 RAM per core memory
    • Two Arm® Cortex®-R5F MCUs in isolated MCU subsystem
    • Four Arm® Cortex®-R5F MCUs in general compute partition
  • Two C66x floating point DSP, up to 1.35 GHz,
    40 GFLOPS, 160 GOPS
  • 3D GPU PowerVR® Rogue 8XE GE8430, up to 750 MHz, 96 GFLOPS, 6 Gpix/sec
  • Custom-designed interconnect fabric supporting near max processing entitlement
  • Memory subsystem:
  • Up to 8MB of on-chip L3 RAM with ECC and coherency
    • ECC error protection
    • Shared coherent cache
    • Supports internal DMA engine
  • External Memory Interface (EMIF) module with ECC
    • Supports LPDDR4 memory types
    • Supports speeds up to 3733 MT/s
    • 32-bit data bus with inline ECC up to 14.9GB/s
  • General-Purpose Memory Controller (GPMC)
  • 512KB on-chip SRAM in MAIN domain, protected by ECC
  • Safety: targeted to meet ASIL-D for MCU island and ASIL-B for main processor
  • Integrated MCU island subsystem of Dual Arm® Cortex®-R5F cores with floating point coprocessor and optional lockstep operation, targeted to meet ASIL-D safety requirements/certification
    • 512B Scratchpad RAM memory
    • Up to 1MB on-chip RAM with ECC dedicated for R5F
    • Integrated Cortex®-R5F MCU island isolated on separate voltage and clock domains
      • Dedicated memory and interfaces capable of being isolated from the larger SoC
  • The TDA4VM main processor is targeted to meet ASIL-B safety requirements/certification
    • Widespread ECC protection of on-chip memory and interconnect
    • Built-in self-test (BIST) and fault-injection for CPU and on-chip RAM
    • Error Signaling Module (ESM) with error pin
    • Runtime safety diagnostics, voltage, temperature, and clock monitoring, windowed watchdog timers, CRC engine for memory integrity checks
    • Safety documentation available for applications required to meet ISO 26262 requirements
  • Device security:
  • Secure boot with secure runtime support
  • Customer programmable root key, up to RSA-4K or ECC-512
  • Embedded hardware security module
  • Crypto hardware accelerators – PKA with ECC, AES, SHA, RNG, DES and 3DES
  • High speed serial interfaces:
  • Integrated ethernet switch supporting
    (total of 8 external ports)
    • Up to eight 2.5Gb SGMII
    • Up to eight RMII (10/100) or RGMII (10/100/1000)
    • Up to two QSGMII
  • Up to four PCI-Express® (PCIe) Gen3 controllers
    • Up to two lanes per controller
    • Gen1 (2.5GT/s), Gen2 (5.0GT/s), and Gen3 (8.0GT/s) operation with auto-negotiation
  • Two USB 3.0 dual-role device (DRD) subsystem
    • Two enhanced SuperSpeed Gen1 Ports
    • Each port supports Type-C switching
    • Each port independently configurable as USB host, USB peripheral, or USB DRD
  • Automotive interfaces:
  • Sixteen Modular Controller Area Network (MCAN) modules with full CAN-FD support
  • Capture subsystem:
  • Two CSI2.0 4L RX plus One CSI2.0 4L TX
    • 2.5Gbps RX throughput per lane (20Gbps total)
  • Display subsystem:
  • One eDP/DP interface with Multi-Display Support (MST)
    • HDCP1.4/HDCP2.2 high-bandwidth digital content protection
  • One DSI TX (up to 2.5K)
  • Up to two DPI
  • Audio interfaces:
  • Twelve Multichannel Audio Serial Port (MCASP) modules
  • Video acceleration:
  • Ultra-HD video, one (3840 × 2160p, 60 fps), or two (3840 × 2160p, 30 fps) H.264/H.265 decode
  • Full-HD video, four (1920 × 1080p, 60 fps), or eight (1920 × 1080p, 30 fps) H.264/H.265 decode
  • Full-HD video, one (1920 × 1080p, 60 fps), or up to three (1920 × 1080p, 30 fps) H.264 encode
  • Flash memory interfaces:
  • Embedded MultiMediaCard Interface (eMMC™ 5.1)
  • Universal Flash Storage (UFS 2.1) interface with two lanes
  • Two Secure Digital® 3.0/Secure Digital Input Output 3.0 interfaces (SD3.0/SDIO3.0)
  • Two simultaneous flash interfaces configured as
    • One OSPI and one QSPI flash interfaces
    • or HyperBus™ and QSPI flash interface
  • System-on-Chip (SoC) architecture:
  • 16-nm FinFET technology
  • 24 mm × 24 mm, 0.8-mm pitch, 827-pin FCBGA (ALF), enables IPC class 3 PCB routing
  • TPS6594-Q1 Companion Power Management ICs (PMIC):
  • Functional Safety support up to ASIL-D
  • Flexible mapping to support different use cases

All trademarks are the property of their respective owners.

open-in-new 查找其它 TDAx ADAS SOC


The TDA4VM processor family is based on the evolutionary Jacinto™ 7 architecture, targeted at ADAS and Autonomous Vehicle (AV) applications and built on extensive market knowledge accumulated over a decade of TI’s leadership in the ADAS processor market. The TDA4VM provides high performance compute for both traditional and deep learning algorithms at industry leading power/performance ratios with a high level of system integration to enable scalability and lower costs for advanced automotive platforms supporting multiple sensor modalities in centralized ECUs or stand-alone sensors. Key cores include next generation DSP with scalar and vector cores, dedicated deep learning and traditional algorithm accelerators, latest Arm and GPU processors for general compute, an integrated next generation imaging subsystem (ISP), video codec, Ethernet hub and isolated MCU island. All protected by automotive grade safety and security hardware accelerators.

Key Performance Cores Overview

The “C7x” next generation DSP combines TI’s industry leading DSP and EVE cores into a single higher performance core and adds floating point vector calculation capabilities, enabling backward compatibility for legacy code while simplifying software programming. The new “MMA” deep learning accelerator enables performance up to 8 TOPS within the lowest power envelope in the industry when operating at the typical automotive worst case junction temperature of 125°C. The dedicated ADAS/AV hardware accelerators provide vision pre-processing plus distance and motion processing with no impact on system performance.

General Compute Cores and Integration Overview

Separate dual core cluster configuration of Arm® Cortex®-A72 facilitates multi-OS applications with minimal need for a software hypervisor. Up to 4 Arm® Cortex®-R5F subsystems enable low-level, timing critical processing tasks to leave the Arm® Cortex®-A72’s unencumbered for applications. The integrated “8XE GE8430” GPU offers up to 100 GFLOPS to enable dynamic 3D rendering for enhanced viewing applications. Building on the existing world-class ISP, TI’s 7th generation ISP includes flexibility to process a broader sensor suite, support for higher bit depth, and features targeting analytics applications. Integrated diagnostics and safety features support operations up to ASIL-D levels while the integrated security features protect data against modern day attacks. To enable systems requiring heavy data bandwidth, a PCIe hub and Gigabit Ethernet switch are included along with CSI-2 ports to support throughput for many sensor inputs. To further the integration, the TDA4VM family also includes an MCU island eliminating the need for an external system microcontroller.

open-in-new 查找其它 TDAx ADAS SOC


ALF 封装目前处于预览状态。可提供 XTDA4VMXXXGALF 的试生产样品(用 XJ721EGALF 代表)。立即申请


= 特色
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类型 标题 下载最新的英文版本 发布
* 用户指南 AM752x/DRA829/TDA4xM Technical Reference Manual 2019年 11月 14日
白皮书 A 360-degree view of surround-view and automated parking systems.. 2020年 3月 1日
白皮书 A 360-degree view of surround-view and automated parking systems. 2020年 3月 1日
白皮书 Leverage Jacinto 7 Processors Functional Safety Features for Automotive DesignsK 2020年 3月 1日
白皮书 Leverage Jacinto 7 Processors Functional Safety Features for Automotive DesignsN 2020年 3月 1日
白皮书 充分利用 Jacinto 7 处理器的汽车设计功能安全特性 下载英文版本 2020年 3月 1日
白皮书 360 度全景视图自动泊车系统 下载英文版本 2020年 2月 4日
技术文章 Making ADAS technology more accessible in vehicles 2020年 1月 7日
更多文献资料 Jacinto Automotive Processor System-On-Module Quick Start Guide 2019年 10月 10日
应用手册 Jacinto 7 High-Speed Interface Layout Guidelines 2019年 10月 4日
用户指南 C6000-to-C7000 Migration User's Guide 2019年 8月 11日
用户指南 VCOP Kernel-C to C7000 Migration Tool User's Guide 2019年 8月 11日
用户指南 TPS6594, TP6594-Q1, TPS6593, TP6593-Q1 Technical Reference Manual 2019年 7月 9日
应用手册 Jacinto 7 LPDDR4 Board Design and Layout Guidelines 2019年 6月 25日
技术文章 Smart sensors are going to change how you drive (because eventually, you won’t) 2018年 4月 25日
技术文章 AI in Automotive: Practical deep learning 2018年 2月 8日
技术文章 How to maintain automotive front camera thermal performance on a hot summer day 2018年 2月 2日




评估板 下载
document-generic 用户指南

The TDA4VMXEVM is an evaluation platform designed to speed up development efforts and reduce time to market for ADAS applications.

The TDA4x EVM is based on a TDA4VMx System-on-Chip (SoC) that incorporates a powerful heterogeneous, scalable architecture that includes a mix of TI’s fixed and (...)

  • SOM
    • J721E Processor
    • Mates with the Common Processor board (SOM and CP are needed for base EVM functionality)
    • Optimized power solution (PMIC)
    • DRAM, LPDDR4‐3733, 4GByte total memory, support inline ECC
    • Octal‐SPI NOR flash, 512Mb memory (8bit)
    • HyperFlash + HyerRAM, 512Mb flash memory + 256Mb RAM
  • Common (...)
开发套件 下载
These rugged development kits are in a finalized product form-factor that lets you evaluate TI ADAS technology under realistic on-vehicle conditions. Accelerate development of autonomous vision-based navigation systems for automotive, transportation and materials handling applications. The (...)


软件开发套件 (SDK) 下载
Software Development Kit for DRA8x & TDA4x Jacinto Automotive Processors
PROCESSOR-SDK-DRA8X-TDA4X — Processor SDK RTOS Automotive (PSDKRA) and Processor SDK Linux Automotive (PSDKLA) together form a multi-processor software development platform for TDA4x and DRA8x SoCs within the TI’s Jacinto™ automotive platform. The SDK provides a comprehensive set of software tools and (...)


  • R5F SPL: eMMC boot, HS400 mode support
  • A72 U-boot: USB Mass Storage Class, Device Firmware Upgrade (DFU) , Universal Flash Storage (UFS), eMMC boot
  • Kernel Connectivity drivers: CPSW9G Ethernet Virtual driver, USB gadget, dual role support, SD card Ultra-High Speed (UHS) mode, PCIe backplane (...)
应用软件和框架 下载
Third party folder page for Hella-Aglaia Forward Camera Algorithms
由 Hella Aglaia 提供 HELLA Aglaia 为高级驾驶辅助系统开发了嵌入式软件解决方案,该解决方案不仅符合经认证的行业标准,还可随时用于硬件集成。

通过利用 TDA4x 处理器系列强大的深度学习功能,HELLA Aglaia 稳健的图像处理软件即使在处理高分辨率摄像头数据时,也能实现精确、高效的图像分析。该软件经优化可轻松用于 TDA4x 处理器架构。

组件 任务 类别


  • 汽车相关物体检测与定位

11 类,例如

  • 行人检测
  • 车辆检测
  • 交通信号灯检测
  • 交通标志检测
  • 人孔检测
  • 建筑工地标志检测


  • 驾驶区域限制(物体、路缘、未标记的道路边界)检测
  • 限定对象指示
  • 道路检测
  • 路边检测


  • 基于视觉线索呈现 3D 现实世界
  • 50 阶对数距离标度
应用软件和框架 下载
Third party folder page for Momenta Deep Learning Algorithms for ADAS
由 Momenta 提供 Momenta’s deep learning based algorithms for ADAS applications make full use of the DSP cores and accelerators on TDA4x for neural network processing. Designed to achieve market leading computational and power efficiency, Momenta’s algorithms offer an array of pre- and post-imaging (...)
调试探测 下载
XDS110 JTAG 调试探针
TMDSEMU110-U The Texas Instruments XDS110 is a new class of debug probe (emulator) for TI embedded processors. The XDS110 replaces the XDS100 family while supporting a wider variety of standards (IEEE1149.1, IEEE1149.7, SWD) in a single pod. Also, all XDS debug probes support Core and System Trace in all ARM and (...)

The XDS110 is the latest entry level debug probe (emulators) for TI embedded processors. Designed to be a complete solution that delivers JTAG and SWD connectivity at a low cost, the XDS110 is the debug probe of choice for entry-level debugging of TI microcontrollers, processors and SimpleLink (...)

IDE、配置、编译器和调试器 下载
Code Composer Studio (CCS) 集成开发环境 (IDE)

下载最新 Code Composer Studio 版本

Code Composer Studio™ - 集成开发环境

Code Composer Studio 是一种集成开发环境 (IDE),支持 TI 的微控制器和嵌入式处理器产品系列。Code Composer Studio 包含一整套用于开发和调试嵌入式应用的工具。它包含了用于优化的 C/C++ 编译器、源码编辑器、项目构建环境、调试器、描述器以及多种其他功能。直观的 IDE 提供了单个用户界面,可帮助您完成应用开发流程的每个步骤。熟悉的工具和界面使用户能够比以前更快地入手。Code Composer Studio 将 Eclipse 软件框架的优点和 TI 先进的嵌入式调试功能相结合,为嵌入式开发人员提供了一个引人注目、功能丰富的开发环境。




Code Composer Studio 支持 TI 的广泛的嵌入式处理器产品系列。如果以上没有您感兴趣的系列,请选择在所用处理器内核上最接近的一种。


  • CCS 最新版本 - 单击下面可以下载指定主机平台的 CCSv6。
  • 其他下载 - 有关完整下载的列表,请访问 CCS (...)
操作系统 (OS) 下载
QNX Neutrino RTOS
由 QNX Software Systems 提供 — The QNX Neutrino® Realtime Operating System (RTOS) is a full-featured and robust RTOS designed to enable the next-generation of products for automotive, medical, transportation, military and industrial embedded systems. Microkernel design and modular architecture enable customers to create (...)


仿真模型 下载
SPRM751.ZIP (13 KB) - BSDL Model
仿真模型 下载
SPRM752.ZIP (1983 KB) - IBIS Model
仿真模型 下载
SPRM753.ZIP (1 KB) - Thermal Model
计算工具 下载


封装 引脚 下载
FCBGA (ALF) 827 视图选项



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