SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
Table 4-9 lists the memory-mapped registers for the System Control. All register offset addresses not listed in Table 4-9 should be considered as reserved locations and the register contents should not be modified.
Additional flash and ROM registers defined in the System Control register space are described in Section 7.
All address offsets given are relative to the System Control base address of 0x400FE000.
| Offset | Acronym | Register Name | Section |
|---|---|---|---|
| 0x0 | DID0 | Device Identification | Section 4.2.1 |
| 0x4 | DID1 | Device Identification | Section 4.2.2 |
| 0x38 | PTBOCTL | Power-Temp Brownout Control | Section 4.2.3 |
| 0x50 | RIS | Raw Interrupt Status | Section 4.2.4 |
| 0x54 | IMC | Interrupt Mask Control | Section 4.2.5 |
| 0x58 | MISC | RW1C Masked Interrupt Status and Clear | Section 4.2.6 |
| 0x5C | RESC | Reset Cause | Section 4.2.7 |
| 0x60 | PWRTC | RW1C Power-Temperature Cause | Section 4.2.8 |
| 0x64 | NMIC | NMI Cause Register | Section 4.2.9 |
| 0x7C | MOSCCTL | Main Oscillator Control | Section 4.2.10 |
| 0xB0 | RSCLKCFG | Run and Sleep Mode Configuration Register | Section 4.2.11 |
| 0xC0 | MEMTIM0 | Memory Timing Parameter Register 0 for Main Flash and EEPROM | Section 4.2.12 |
| 0x138 | ALTCLKCFG | Alternate Clock Configuration | Section 4.2.13 |
| 0x144 | DSCLKCFG | Deep Sleep Clock Configuration Register | Section 4.2.14 |
| 0x148 | DIVSCLK | Divisor and Source Clock Configuration | Section 4.2.15 |
| 0x14C | SYSPROP | System Properties | Section 4.2.16 |
| 0x150 | PIOSCCAL | Precision Internal Oscillator Calibration | Section 4.2.17 |
| 0x154 | PIOSCSTAT | Precision Internal Oscillator Statistics | Section 4.2.18 |
| 0x160 | PLLFREQ0 | PLL Frequency 0 | Section 4.2.19 |
| 0x164 | PLLFREQ1 | PLL Frequency 1 | Section 4.2.20 |
| 0x168 | PLLSTAT | PLL Status | Section 4.2.21 |
| 0x188 | SLPPWRCFG | Sleep Power Configuration | Section 4.2.22 |
| 0x18C | DSLPPWRCFG | Deep-Sleep Power Configuration | Section 4.2.23 |
| 0x1A0 | NVMSTAT | Non-Volatile Memory Information | Section 4.2.24 |
| 0x1B4 | LDOSPCTL | LDO Sleep Power Control | Section 4.2.25 |
| 0x1B8 | LDOSPCAL | LDO Sleep Power Calibration | Section 4.2.26 |
| 0x1BC | LDODPCTL | LDO Deep-Sleep Power Control | Section 4.2.27 |
| 0x1C0 | LDODPCAL | LDO Deep-Sleep Power Calibration | Section 4.2.28 |
| 0x1CC | SDPMST | Sleep / Deep-Sleep Power Mode Status | Section 4.2.29 |
| 0x1D8 | RESBEHAVCTL | Reset Behavior Control Register | Section 4.2.30 |
| 0x1F4 | HSSR | Hardware System Service Request | Section 4.2.31 |
| 0x280 | USBPDS | USB Power Domain Status | Section 4.2.32 |
| 0x284 | USBMPC | USB Memory Power Control | Section 4.2.33 |
| 0x288 | EMACPDS | Ethernet MAC Power Domain Status | Section 4.2.34 |
| 0x28C | EMACMPC | Ethernet MAC Memory Power Control | Section 4.2.35 |
| 0x290 | LCDPDS | LCD Power Domain Status | Section 4.2.36 |
| 0x294 | LCDMPC | LCD Memory Power Control | Section 4.2.37 |
| 0x298 | CAN0PDS | CAN 0 Power Domain Status | Section 4.2.38 |
| 0x29C | CAN0MPC | CAN 0 Memory Power Control | Section 4.2.39 |
| 0x2A0 | CAN1PDS | CAN 1 Power Domain Status | Section 4.2.40 |
| 0x2A4 | CAN1MPC | CAN 1 Memory Power Control | Section 4.2.41 |
| 0x300 | PPWD | Watchdog Timer Peripheral Present | Section 4.2.42 |
| 0x304 | PPTIMER | 16/32-Bit General-Purpose Timer Peripheral Present | Section 4.2.43 |
| 0x308 | PPGPIO | General-Purpose Input/Output Peripheral Present | Section 4.2.44 |
| 0x30C | PPDMA | Micro Direct Memory Access Peripheral Present | Section 4.2.45 |
| 0x310 | PPEPI | EPI Peripheral Present | Section 4.2.46 |
| 0x314 | PPHIB | Hibernation Peripheral Present | Section 4.2.47 |
| 0x318 | PPUART | Universal Asynchronous Receiver/Transmitter Peripheral Present | Section 4.2.48 |
| 0x31C | PPSSI | Synchronous Serial Interface Peripheral Present | Section 4.2.49 |
| 0x320 | PPI2C | Inter-Integrated Circuit Peripheral Present | Section 4.2.50 |
| 0x328 | PPUSB | Universal Serial Bus Peripheral Present | Section 4.2.51 |
| 0x330 | PPEPHY | Ethernet PHY Peripheral Present | Section 4.2.52 |
| 0x334 | PPCAN | Controller Area Network Peripheral Present | Section 4.2.53 |
| 0x338 | PPADC | Analog-to-Digital Converter Peripheral Present | Section 4.2.54 |
| 0x33C | PPACMP | Analog Comparator Peripheral Present | Section 4.2.55 |
| 0x340 | PPPWM | Pulse Width Modulator Peripheral Present | Section 4.2.56 |
| 0x344 | PPQEI | Quadrature Encoder Interface Peripheral Present | Section 4.2.57 |
| 0x358 | PPEEPROM | EEPROM Peripheral Present | Section 4.2.58 |
| 0x374 | PPCCM | CRC and Cryptographic Modules Peripheral Present | Section 4.2.59 |
| 0x390 | PPLCD | LCD Peripheral Present | Section 4.2.60 |
| 0x398 | PPOWIRE | 1-Wire Peripheral Present | Section 4.2.61 |
| 0x39C | PPEMAC | Ethernet MAC Peripheral Present | Section 4.2.62 |
| 0x3A0 | PPPRB | Power Regulator Bus Peripheral Present | Section 4.2.63 |
| 0x500 | SRWD | Watchdog Timer Software Reset | Section 4.2.64 |
| 0x504 | SRTIMER | 16/32-Bit General-Purpose Timer Software Reset | Section 4.2.65 |
| 0x508 | SRGPIO | General-Purpose Input/Output Software Reset | Section 4.2.66 |
| 0x50C | SRDMA | Micro Direct Memory Access Software Reset | Section 4.2.67 |
| 0x510 | SREPI | EPI Software Reset | Section 4.2.68 |
| 0x514 | SRHIB | Hibernation Software Reset | Section 4.2.69 |
| 0x518 | SRUART | Universal Asynchronous Receiver/Transmitter Software Reset | Section 4.2.70 |
| 0x51C | SRSSI | Synchronous Serial Interface Software Reset | Section 4.2.71 |
| 0x520 | SRI2C | Inter-Integrated Circuit Software Reset | Section 4.2.72 |
| 0x528 | SRUSB | Universal Serial Bus Software Reset | Section 4.2.73 |
| 0x530 | SREPHY | Ethernet PHY Software Reset | Section 4.2.74 |
| 0x534 | SRCAN | Controller Area Network Software Reset | Section 4.2.75 |
| 0x538 | SRADC | Analog-to-Digital Converter Software Reset | Section 4.2.76 |
| 0x53C | SRACMP | Analog Comparator Software Reset | Section 4.2.77 |
| 0x540 | SRPWM | Pulse Width Modulator Software Reset | Section 4.2.78 |
| 0x544 | SRQEI | Quadrature Encoder Interface Software Reset | Section 4.2.79 |
| 0x558 | SREEPROM | EEPROM Software Reset | Section 4.2.80 |
| 0x574 | SRCCM | CRC and Cryptographic Modules Software Reset | Section 4.2.81 |
| 0x590 | SRLCD | LCD Controller Software Reset | Section 4.2.82 |
| 0x598 | SROWIRE | 1-Wire Software Reset | Section 4.2.83 |
| 0x59C | SREMAC | Ethernet MAC Software Reset | Section 4.2.84 |
| 0x600 | RCGCWD | Watchdog Timer Run Mode Clock Gating Control | Section 4.2.85 |
| 0x604 | RCGCTIMER | 16/32-BitGeneral-Purpose Timer RunMode Clock Gating Control | Section 4.2.86 |
| 0x608 | RCGCGPIO | General-Purpose Input/Output Run Mode Clock Gating Control | Section 4.2.87 |
| 0x60C | RCGCDMA | Micro Direct Memory Access Run Mode Clock Gating Control | Section 4.2.88 |
| 0x610 | RCGCEPI | EPI Run Mode Clock Gating Control | Section 4.2.89 |
| 0x614 | RCGCHIB | Hibernation Run Mode Clock Gating Control | Section 4.2.90 |
| 0x618 | RCGCUART | Universal Asynchronous Receiver/Transmitter RunMode Clock Gating Control | Section 4.2.91 |
| 0x61C | RCGCSSI | Synchronous Serial Interface Run Mode Clock Gating Control | Section 4.2.92 |
| 0x620 | RCGCI2C | Inter-Integrated Circuit Run Mode Clock Gating Control | Section 4.2.93 |
| 0x628 | RCGCUSB | Universal Serial Bus Run Mode Clock Gating Control | Section 4.2.94 |
| 0x630 | RCGCEPHY | Ethernet PHY Run Mode Clock Gating Control | Section 4.2.95 |
| 0x634 | RCGCCAN | Controller Area Network RunMode Clock Gating Control | Section 4.2.96 |
| 0x638 | RCGCADC | Analog-to-Digital Converter Run Mode Clock Gating Control | Section 4.2.97 |
| 0x63C | RCGCACMP | Analog Comparator Run Mode Clock Gating Control | Section 4.2.98 |
| 0x640 | RCGCPWM | Pulse Width Modulator Run Mode Clock Gating Control | Section 4.2.99 |
| 0x644 | RCGCQEI | Quadrature Encoder Interface Run Mode Clock Gating Control | Section 4.2.100 |
| 0x658 | RCGCEEPROM | EEPROM Run Mode Clock Gating Control | Section 4.2.101 |
| 0x674 | RCGCCCM | CRC and CryptographicModules RunMode ClockGating Control | Section 4.2.102 |
| 0x690 | RCGCLCD | LCD Controller Run Mode Clock Gating Control | Section 4.2.103 |
| 0x698 | RCGCOWIRE | 1-Wire Run Mode Clock Gating Control | Section 4.2.104 |
| 0x69C | RCGCEMAC | Ethernet MAC Run Mode Clock Gating Control | Section 4.2.105 |
| 0x700 | SCGCWD | Watchdog Timer Sleep Mode Clock Gating Control | Section 4.2.106 |
| 0x704 | SCGCTIMER | 16/32-Bit General-Purpose Timer Sleep Mode Clock Gating Control | Section 4.2.107 |
| 0x708 | SCGCGPIO | General-Purpose Input/Output Sleep Mode Clock Gating Control | Section 4.2.108 |
| 0x70C | SCGCDMA | Micro Direct Memory Access Sleep Mode Clock Gating Control | Section 4.2.109 |
| 0x710 | SCGCEPI | EPI Sleep Mode Clock Gating Control | Section 4.2.110 |
| 0x714 | SCGCHIB | Hibernation Sleep Mode Clock Gating Control | Section 4.2.111 |
| 0x718 | SCGCUART | Universal Asynchronous Receiver/Transmitter Sleep Mode Clock Gating Control | Section 4.2.112 |
| 0x71C | SCGCSSI | Synchronous Serial Interface Sleep Mode Clock Gating Control | Section 4.2.113 |
| 0x720 | SCGCI2C | Inter-Integrated Circuit Sleep Mode Clock Gating Control | Section 4.2.114 |
| 0x728 | SCGCUSB | Universal Serial Bus Sleep Mode Clock Gating Control | Section 4.2.115 |
| 0x730 | SCGCEPHY | Ethernet PHY Sleep Mode Clock Gating Control | Section 4.2.116 |
| 0x734 | SCGCCAN | Controller Area Network Sleep Mode Clock Gating Control | Section 4.2.117 |
| 0x738 | SCGCADC | Analog-to-Digital Converter Sleep Mode Clock Gating Control | Section 4.2.118 |
| 0x73C | SCGCACMP | Analog Comparator Sleep Mode Clock Gating Control | Section 4.2.119 |
| 0x740 | SCGCPWM | PulseWidthModulator Sleep Mode Clock Gating Control | Section 4.2.120 |
| 0x744 | SCGCQEI | Quadrature Encoder Interface Sleep Mode Clock Gating Control | Section 4.2.121 |
| 0x758 | SCGCEEPROM | EEPROM Sleep Mode Clock Gating Control | Section 4.2.122 |
| 0x774 | SCGCCCM | CRC and Cryptographic Modules Sleep Mode Clock Gating Control | Section 4.2.123 |
| 0x790 | SCGCLCD | LCD Controller Sleep Mode Clock Gating Control | Section 4.2.124 |
| 0x798 | SCGCOWIRE | 1-Wire Sleep Mode Clock Gating Control | Section 4.2.125 |
| 0x79C | SCGCEMAC | Ethernet MAC Sleep Mode Clock Gating Control | Section 4.2.126 |
| 0x800 | DCGCWD | Watchdog Timer Deep-SleepMode Clock Gating Control | Section 4.2.127 |
| 0x804 | DCGCTIMER | Clock 16/32-Bit General-Purpose Timer Deep-Sleep Mode Gating Control | Section 4.2.128 |
| 0x808 | DCGCGPIO | General-Purpose Input/Output Deep-Sleep Mode Clock Gating Control | Section 4.2.129 |
| 0x80C | DCGCDMA | Micro Direct Memory Access Deep-Sleep Mode Clock Gating Control | Section 4.2.130 |
| 0x810 | DCGCEPI | EPI Deep-Sleep Mode Clock Gating Control | Section 4.2.131 |
| 0x814 | DCGCHIB | Hibernation Deep-Sleep Mode Clock Gating Control | Section 4.2.132 |
| 0x818 | DCGCUART | Universal Asynchronous Receiver/Transmitter Deep-Sleep Mode Clock Gating Control | Section 4.2.133 |
| 0x81C | DCGCSSI | Synchronous Serial Interface Deep-Sleep Mode Clock Gating Control | Section 4.2.134 |
| 0x820 | DCGCI2C | Inter-Integrated Circuit Deep-Sleep Mode Clock Gating Control | Section 4.2.135 |
| 0x828 | DCGCUSB | Universal Serial Bus Deep-Sleep Mode Clock Gating Control | Section 4.2.136 |
| 0x830 | DCGCEPHY | Ethernet PHY Deep-Sleep Mode Clock Gating Control | Section 4.2.137 |
| 0x834 | DCGCCAN | Controller Area Network Deep-SleepMode Clock Gating Control | Section 4.2.138 |
| 0x838 | DCGCADC | Analog-to-Digital Converter Deep-Sleep Mode Clock Gating Control | Section 4.2.139 |
| 0x83C | DCGCACMP | Analog Comparator Deep-Sleep Mode Clock Gating Control | Section 4.2.140 |
| 0x840 | DCGCPWM | Pulse Width Modulator Deep-Sleep Mode Clock Gating Control | Section 4.2.141 |
| 0x844 | DCGCQEI | Quadrature Encoder Interface Deep-Sleep Mode Clock Gating Control | Section 4.2.142 |
| 0x858 | DCGCEEPROM | EEPROM Deep-Sleep Mode Clock Gating Control | Section 4.2.143 |
| 0x874 | DCGCCCM | CRC and Cryptographic Modules Deep-Sleep Mode Clock Gating Control | Section 4.2.144 |
| 0x890 | DCGCLCD | LCD Controller Deep-Sleep Mode Clock Gating Control | Section 4.2.145 |
| 0x898 | DCGCOWIRE | 1-Wire Deep-Sleep Mode Clock Gating Control | Section 4.2.146 |
| 0x89C | DCGCEMAC | Ethernet MAC Deep-Sleep Mode Clock Gating Control | Section 4.2.147 |
| 0x900 | PCWD | Watchdog Timer Power Control | Section 4.2.148 |
| 0x904 | PCTIMER | 16/32-Bit General-Purpose Timer Power Control | Section 4.2.149 |
| 0x908 | PCGPIO | General-Purpose Input/Output Power Control | Section 4.2.150 |
| 0x90C | PCDMA | Micro Direct Memory Access Power Control | Section 4.2.151 |
| 0x910 | PCEPI | External Peripheral Interface Power Control | Section 4.2.152 |
| 0x914 | PCHIB | Hibernation Power Control | Section 4.2.153 |
| 0x918 | PCUART | Universal Asynchronous Receiver/Transmitter Power Control | Section 4.2.154 |
| 0x91C | PCSSI | Synchronous Serial Interface Power Control | Section 4.2.155 |
| 0x920 | PCI2C | Inter-Integrated Circuit Power Control | Section 4.2.156 |
| 0x928 | PCUSB | Universal Serial Bus Power Control | Section 4.2.157 |
| 0x930 | PCEPHY | Ethernet PHY Power Control | Section 4.2.158 |
| 0x934 | PCCAN | Controller Area Network Power Control | Section 4.2.159 |
| 0x938 | PCADC | Analog-to-Digital Converter Power Control | Section 4.2.160 |
| 0x93C | PCACMP | Analog Comparator Power Control | Section 4.2.161 |
| 0x940 | PCPWM | Pulse Width Modulator Power Control | Section 4.2.162 |
| 0x944 | PCQEI | Quadrature Encoder Interface Power Control | Section 4.2.163 |
| 0x958 | PCEEPROM | EEPROM Power Control | Section 4.2.164 |
| 0x974 | PCCCM | CRC and Cryptographic Modules Power Control | Section 4.2.165 |
| 0x990 | PCLCD | LCD Controller Power Control | Section 4.2.166 |
| 0x998 | PCOWIRE | 1-Wire Power Control | Section 4.2.167 |
| 0x99C | PCEMAC | Ethernet MAC Power Control | Section 4.2.168 |
| 0xA00 | PRWD | Watchdog Timer Peripheral Ready | Section 4.2.169 |
| 0xA04 | PRTIMER | 16/32-Bit General-Purpose Timer Peripheral Ready | Section 4.2.170 |
| 0xA08 | PRGPIO | General-Purpose Input/Output Peripheral Ready | Section 4.2.171 |
| 0xA0C | PRDMA | Micro Direct Memory Access Peripheral Ready | Section 4.2.172 |
| 0xA10 | PREPI | EPI Peripheral Ready | Section 4.2.173 |
| 0xA14 | PRHIB | Hibernation Peripheral Ready | Section 4.2.174 |
| 0xA18 | PRUART | Universal Asynchronous Receiver/Transmitter Peripheral Ready | Section 4.2.175 |
| 0xA1C | PRSSI | Synchronous Serial Interface Peripheral Ready | Section 4.2.176 |
| 0xA20 | PRI2C | Inter-Integrated Circuit Peripheral Ready | Section 4.2.177 |
| 0xA28 | PRUSB | Universal Serial Bus Peripheral Ready | Section 4.2.178 |
| 0xA30 | PREPHY | Ethernet PHY Peripheral Ready | Section 4.2.179 |
| 0xA34 | PRCAN | Controller Area Network Peripheral Ready | Section 4.2.180 |
| 0xA38 | PRADC | Analog-to-Digital Converter Peripheral Ready | Section 4.2.181 |
| 0xA3C | PRACMP | Analog Comparator Peripheral Ready | Section 4.2.182 |
| 0xA40 | PRPWM | Pulse Width Modulator Peripheral Ready | Section 4.2.183 |
| 0xA44 | PRQEI | Quadrature Encoder Interface Peripheral Ready | Section 4.2.184 |
| 0xA58 | PREEPROM | EEPROM Peripheral Ready | Section 4.2.185 |
| 0xA74 | PRCCM | CRC and Cryptographic Modules Peripheral Ready | Section 4.2.186 |
| 0xA90 | PRLCD | LCD Controller Peripheral Ready | Section 4.2.187 |
| 0xA98 | PROWIRE | 1-Wire Peripheral Ready | Section 4.2.188 |
| 0xA9C | PREMAC | Ethernet MAC Peripheral Ready | Section 4.2.189 |
| 0xF20 | UNIQUEID0 | Unique ID 0 | Section 4.2.190 |
| 0xF24 | UNIQUEID1 | Unique ID 1 | Section 4.2.190 |
| 0xF28 | UNIQUEID2 | Unique ID 2 | Section 4.2.190 |
| 0xF2C | UNIQUEID3 | Unique ID 3 | Section 4.2.190 |
Complex bit access types are encoded to fit into small table cells. Table 4-10 lists the codes that are used for access types in this section.
| Access Type | Code | Description |
|---|---|---|
| Read Type | ||
| R | R | Read |
| Write Type | ||
| W | W | Write |
| W1C | 1C W | 1 to clear Write |
| Reset or Default Value | ||
| -n | Value after reset or the default value | |